Loading lib/logic_pio.c +2 −2 Original line number Diff line number Diff line Loading @@ -235,7 +235,7 @@ type logic_in##bwl(unsigned long addr) \ type ret = (type)~0; \ \ if (addr < MMIO_UPPER_LIMIT) { \ ret = read##bwl(PCI_IOBASE + addr); \ ret = _in##bwl(addr); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ struct logic_pio_hwaddr *entry = find_io_range(addr); \ \ Loading @@ -251,7 +251,7 @@ type logic_in##bwl(unsigned long addr) \ void logic_out##bwl(type value, unsigned long addr) \ { \ if (addr < MMIO_UPPER_LIMIT) { \ write##bwl(value, PCI_IOBASE + addr); \ _out##bwl(value, addr); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ struct logic_pio_hwaddr *entry = find_io_range(addr); \ \ Loading Loading
lib/logic_pio.c +2 −2 Original line number Diff line number Diff line Loading @@ -235,7 +235,7 @@ type logic_in##bwl(unsigned long addr) \ type ret = (type)~0; \ \ if (addr < MMIO_UPPER_LIMIT) { \ ret = read##bwl(PCI_IOBASE + addr); \ ret = _in##bwl(addr); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ struct logic_pio_hwaddr *entry = find_io_range(addr); \ \ Loading @@ -251,7 +251,7 @@ type logic_in##bwl(unsigned long addr) \ void logic_out##bwl(type value, unsigned long addr) \ { \ if (addr < MMIO_UPPER_LIMIT) { \ write##bwl(value, PCI_IOBASE + addr); \ _out##bwl(value, addr); \ } else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \ struct logic_pio_hwaddr *entry = find_io_range(addr); \ \ Loading