Loading drivers/mtd/maps/pci.c +3 −13 Original line number Diff line number Diff line Loading @@ -203,16 +203,9 @@ intel_dc21285_init(struct pci_dev *dev, struct map_pci_info *map) * not enabled, should we be allocating a new resource for it * or simply enabling it? */ if (!(pci_resource_flags(dev, PCI_ROM_RESOURCE) & IORESOURCE_ROM_ENABLE)) { u32 val; pci_resource_flags(dev, PCI_ROM_RESOURCE) |= IORESOURCE_ROM_ENABLE; pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val); val |= PCI_ROM_ADDRESS_ENABLE; pci_write_config_dword(dev, PCI_ROM_ADDRESS, val); pci_enable_rom(dev); printk("%s: enabling expansion ROM\n", pci_name(dev)); } } if (!len || !base) return -ENXIO; Loading Loading @@ -240,10 +233,7 @@ intel_dc21285_exit(struct pci_dev *dev, struct map_pci_info *map) /* * We need to undo the PCI BAR2/PCI ROM BAR address alteration. */ pci_resource_flags(dev, PCI_ROM_RESOURCE) &= ~IORESOURCE_ROM_ENABLE; pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val); val &= ~PCI_ROM_ADDRESS_ENABLE; pci_write_config_dword(dev, PCI_ROM_ADDRESS, val); pci_disable_rom(dev); } static unsigned long Loading Loading
drivers/mtd/maps/pci.c +3 −13 Original line number Diff line number Diff line Loading @@ -203,16 +203,9 @@ intel_dc21285_init(struct pci_dev *dev, struct map_pci_info *map) * not enabled, should we be allocating a new resource for it * or simply enabling it? */ if (!(pci_resource_flags(dev, PCI_ROM_RESOURCE) & IORESOURCE_ROM_ENABLE)) { u32 val; pci_resource_flags(dev, PCI_ROM_RESOURCE) |= IORESOURCE_ROM_ENABLE; pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val); val |= PCI_ROM_ADDRESS_ENABLE; pci_write_config_dword(dev, PCI_ROM_ADDRESS, val); pci_enable_rom(dev); printk("%s: enabling expansion ROM\n", pci_name(dev)); } } if (!len || !base) return -ENXIO; Loading Loading @@ -240,10 +233,7 @@ intel_dc21285_exit(struct pci_dev *dev, struct map_pci_info *map) /* * We need to undo the PCI BAR2/PCI ROM BAR address alteration. */ pci_resource_flags(dev, PCI_ROM_RESOURCE) &= ~IORESOURCE_ROM_ENABLE; pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val); val &= ~PCI_ROM_ADDRESS_ENABLE; pci_write_config_dword(dev, PCI_ROM_ADDRESS, val); pci_disable_rom(dev); } static unsigned long Loading