Commit 4aaf96ac authored by Maor Gottlieb's avatar Maor Gottlieb Committed by Saeed Mahameed
Browse files

net/mlx5: DR, Don't use SW steering when RoCE is not supported 



SW steering uses RC QP to write/read to/from ICM, hence it's not
supported when RoCE is not supported as well.

Fixes: 70605ea5 ("net/mlx5: DR, Expose APIs for direct rule managing")
Signed-off-by: default avatarMaor Gottlieb <maorg@nvidia.com>
Reviewed-by: default avatarAlex Vesker <valex@nvidia.com>
Reviewed-by: default avatarYevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent c189716b

drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5dr.h

+5 −4
Original line number Diff line number Diff line
@@ -124,10 +124,11 @@ int mlx5dr_action_destroy(struct mlx5dr_action *action); 
static inline bool

mlx5dr_is_supported(struct mlx5_core_dev *dev)

{

	return MLX5_CAP_ESW_FLOWTABLE_FDB(dev, sw_owner) ||

	return MLX5_CAP_GEN(dev, roce) &&

	       (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, sw_owner) ||

		(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, sw_owner_v2) &&

		 (MLX5_CAP_GEN(dev, steering_format_version) <=

		 MLX5_STEERING_FORMAT_CONNECTX_6DX));

		  MLX5_STEERING_FORMAT_CONNECTX_6DX)));

}



/* buddy functions & structure */