Commit 4a90bbb4 authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by Vinod Koul
Browse files

phy: uniphier-pcie: Fix updating phy parameters 



The current driver uses a value from register TEST_O as the original
value for register TEST_I, though, the value is overwritten by "param",
so there is a bug that the original value isn't no longer used.

The value of TEST_O[7:0] should be masked with "mask", replaced with
"param", and placed in the bitfield TESTI_DAT_MASK as new TEST_I value.

Fixes: c6d9b132 ("phy: socionext: add PCIe PHY driver support")
Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1623037842-19363-1-git-send-email-hayashi.kunihiko@socionext.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent bd1f775d

drivers/phy/socionext/phy-uniphier-pcie.c

+7 −4
Original line number Diff line number Diff line
@@ -24,11 +24,13 @@ 
#define PORT_SEL_1		FIELD_PREP(PORT_SEL_MASK, 1)



#define PCL_PHY_TEST_I		0x2000

#define PCL_PHY_TEST_O		0x2004

#define TESTI_DAT_MASK		GENMASK(13, 6)

#define TESTI_ADR_MASK		GENMASK(5, 1)

#define TESTI_WR_EN		BIT(0)



#define PCL_PHY_TEST_O		0x2004

#define TESTO_DAT_MASK		GENMASK(7, 0)



#define PCL_PHY_RESET		0x200c

#define PCL_PHY_RESET_N_MNMODE	BIT(8)	/* =1:manual */

#define PCL_PHY_RESET_N		BIT(0)	/* =1:deasssert */
@@ -77,11 +79,12 @@ static void uniphier_pciephy_set_param(struct uniphier_pciephy_priv *priv, 
	val  = FIELD_PREP(TESTI_DAT_MASK, 1);

	val |= FIELD_PREP(TESTI_ADR_MASK, reg);

	uniphier_pciephy_testio_write(priv, val);

	val = readl(priv->base + PCL_PHY_TEST_O);

	val = readl(priv->base + PCL_PHY_TEST_O) & TESTO_DAT_MASK;



	/* update value */

	val &= ~FIELD_PREP(TESTI_DAT_MASK, mask);

	val  = FIELD_PREP(TESTI_DAT_MASK, mask & param);

	val &= ~mask;

	val |= mask & param;

	val = FIELD_PREP(TESTI_DAT_MASK, val);

	val |= FIELD_PREP(TESTI_ADR_MASK, reg);

	uniphier_pciephy_testio_write(priv, val);

	uniphier_pciephy_testio_write(priv, val | TESTI_WR_EN);