Commit 4a65ed65 authored by Andy Shevchenko's avatar Andy Shevchenko
Browse files

Merge branch 'ib-mfd-x86-usb-watchdog-v5.7' 

Merge branch 'ib-mfd-x86-usb-watchdog-v5.7' of
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git


to avoid conflicts in PDx86.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
parents b5f7311d 2f72d35e

Documentation/ABI/obsolete/sysfs-driver-intel_pmc_bxt

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These files allow sending arbitrary IPC commands to the PMC/SCU which

may be dangerous. These will be removed eventually and should not be

used in any new applications.



What:		/sys/bus/platform/devices/INT34D2:00/simplecmd

Date:		Jun 2015

KernelVersion:	4.1

Contact:	Mika Westerberg <mika.westerberg@linux.intel.com>

Description:	This interface allows userspace to send an arbitrary

		IPC command to the PMC/SCU.



		Format: %d %d where first number is command and

		second number is subcommand.



What:		/sys/bus/platform/devices/INT34D2:00/northpeak

Date:		Jun 2015

KernelVersion:	4.1

Contact:	Mika Westerberg <mika.westerberg@linux.intel.com>

Description:	This interface allows userspace to enable and disable

		Northpeak through the PMC/SCU.



		Format: %u.

MAINTAINERS

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@@ -8499,6 +8499,13 @@ L: platform-driver-x86@vger.kernel.org 
S:	Maintained

F:	drivers/platform/x86/intel_atomisp2_pm.c









INTEL BROXTON PMC DRIVER









M:	Mika Westerberg <mika.westerberg@linux.intel.com>









M:	Zha Qipeng <qipeng.zha@intel.com>









S:	Maintained









F:	drivers/mfd/intel_pmc_bxt.c









F:	include/linux/mfd/intel_pmc_bxt.h

















INTEL C600 SERIES SAS CONTROLLER DRIVER









M:	Intel SCU Linux support <intel-linux-scu@intel.com>









M:	Artur Paszkiewicz <artur.paszkiewicz@intel.com>








@@ -8706,6 +8713,13 @@ F:	include/uapi/linux/mic_common.h







F:	include/uapi/linux/mic_ioctl.h









F:	include/uapi/linux/scif_ioctl.h

















INTEL P-Unit IPC DRIVER









M:	Zha Qipeng <qipeng.zha@intel.com>









L:	platform-driver-x86@vger.kernel.org









S:	Maintained









F:	arch/x86/include/asm/intel_punit_ipc.h









F:	drivers/platform/x86/intel_punit_ipc.c

















INTEL PMC CORE DRIVER









M:	Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>









M:	Vishwanath Somayaji <vishwanath.somayaji@intel.com>








@@ -8713,15 +8727,6 @@ L:	platform-driver-x86@vger.kernel.org







S:	Maintained









F:	drivers/platform/x86/intel_pmc_core*

















INTEL PMC/P-Unit IPC DRIVER









M:	Zha Qipeng<qipeng.zha@intel.com>









L:	platform-driver-x86@vger.kernel.org









S:	Maintained









F:	arch/x86/include/asm/intel_pmc_ipc.h









F:	arch/x86/include/asm/intel_punit_ipc.h









F:	drivers/platform/x86/intel_pmc_ipc.c









F:	drivers/platform/x86/intel_punit_ipc.c

















INTEL PMIC GPIO DRIVERS









M:	Andy Shevchenko <andy@kernel.org>









S:	Maintained
































arch/x86/Kconfig



+1
−1






























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@@ -595,7 +595,7 @@ config X86_INTEL_MID







	select I2C









	select DW_APB_TIMER









	select APB_TIMER









	select INTEL_SCU_IPC









	select INTEL_SCU_PCI









	select MFD_INTEL_MSIC









	---help---









	  Select to build a kernel capable of supporting Intel MID (Mobile
































arch/x86/include/asm/intel-mid.h



+6
−3






























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@@ -88,11 +88,17 @@ static inline bool intel_mid_has_msic(void)







	return (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_PENWELL);









}



















extern void intel_scu_devices_create(void);









extern void intel_scu_devices_destroy(void);



















#else /* !CONFIG_X86_INTEL_MID */



















#define intel_mid_identify_cpu()	0









#define intel_mid_has_msic()		0



















static inline void intel_scu_devices_create(void) { }









static inline void intel_scu_devices_destroy(void) { }



















#endif /* !CONFIG_X86_INTEL_MID */



















enum intel_mid_timer_options {








@@ -115,9 +121,6 @@ extern enum intel_mid_timer_options intel_mid_timer_options;







#define SFI_MTMR_MAX_NUM		8









#define SFI_MRTC_MAX			8



















extern void intel_scu_devices_create(void);









extern void intel_scu_devices_destroy(void);



















/* VRTC timer */









#define MRST_VRTC_MAP_SZ		1024









/* #define MRST_VRTC_PGOFFSET		0xc00 */
































arch/x86/include/asm/intel_pmc_ipc.h
deleted100644 → 0



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/* SPDX-License-Identifier: GPL-2.0 */









#ifndef _ASM_X86_INTEL_PMC_IPC_H_









#define  _ASM_X86_INTEL_PMC_IPC_H_



















/* Commands */









#define PMC_IPC_PMIC_ACCESS		0xFF









#define		PMC_IPC_PMIC_ACCESS_READ	0x0









#define		PMC_IPC_PMIC_ACCESS_WRITE	0x1









#define PMC_IPC_USB_PWR_CTRL		0xF0









#define PMC_IPC_PMIC_BLACKLIST_SEL	0xEF









#define PMC_IPC_PHY_CONFIG		0xEE









#define PMC_IPC_NORTHPEAK_CTRL		0xED









#define PMC_IPC_PM_DEBUG		0xEC









#define PMC_IPC_PMC_TELEMTRY		0xEB









#define PMC_IPC_PMC_FW_MSG_CTRL		0xEA



















/* IPC return code */









#define IPC_ERR_NONE			0









#define IPC_ERR_CMD_NOT_SUPPORTED	1









#define IPC_ERR_CMD_NOT_SERVICED	2









#define IPC_ERR_UNABLE_TO_SERVICE	3









#define IPC_ERR_CMD_INVALID		4









#define IPC_ERR_CMD_FAILED		5









#define IPC_ERR_EMSECURITY		6









#define IPC_ERR_UNSIGNEDKERNEL		7



















/* GCR reg offsets from gcr base*/









#define PMC_GCR_PMC_CFG_REG		0x08









#define PMC_GCR_TELEM_DEEP_S0IX_REG	0x78









#define PMC_GCR_TELEM_SHLW_S0IX_REG	0x80



















#if IS_ENABLED(CONFIG_INTEL_PMC_IPC)



















int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,









		u32 *out, u32 outlen);









int intel_pmc_s0ix_counter_read(u64 *data);









int intel_pmc_gcr_read64(u32 offset, u64 *data);



















#else



















static inline int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,









		u32 *out, u32 outlen)









{









	return -EINVAL;









}



















static inline int intel_pmc_s0ix_counter_read(u64 *data)









{









	return -EINVAL;









}



















static inline int intel_pmc_gcr_read64(u32 offset, u64 *data)









{









	return -EINVAL;









}



















#endif /*CONFIG_INTEL_PMC_IPC*/



















#endif