Commit 4a0c7a68 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'perf-tools-fixes-for-v6.2-3-2023-01-19' of...

Merge tag 'perf-tools-fixes-for-v6.2-3-2023-01-19' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux

Pull perf tools fixes from Arnaldo Carvalho de Melo:

 - Prevent reading into undefined memory in the expression lexer,
   accounting for a trailer backslash followed by the null byte.

 - Fix file mode when copying files to the build id cache, the problem
   happens when the cache directory is in a different file system than
   the file being cached, otherwise the mode was preserved as only a
   hard link would be done to save space.

 - Fix a related build-id 'perf test' entry that checked that permission
   when caching PE (Portable Executable) files, used when profiling
   Windows executables under wine.

 - Sync the tools/ copies of kvm headers, build_bug.h, socket.h and
   arm64's cputype.h with the kernel sources.

* tag 'perf-tools-fixes-for-v6.2-3-2023-01-19' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
  perf test build-id: Fix test check for PE file
  perf buildid-cache: Fix the file mode with copyfile() while adding file to build-id cache
  perf expr: Prevent normalize() from reading into undefined memory in the expression lexer
  tools headers: Syncronize linux/build_bug.h with the kernel sources
  perf beauty: Update copy of linux/socket.h with the kernel sources
  tools headers arm64: Sync arm64's cputype.h with the kernel sources
  tools kvm headers arm64: Update KVM header from the kernel sources
  tools headers UAPI: Sync x86's asm/kvm.h with the kernel sources
  tools headers UAPI: Sync linux/kvm.h with the kernel sources
parents d368967c 3d9c07c4
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+7 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@
	(((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)

#define MIDR_CPU_MODEL(imp, partnum) \
	(((imp)			<< MIDR_IMPLEMENTOR_SHIFT) | \
	((_AT(u32, imp)		<< MIDR_IMPLEMENTOR_SHIFT) | \
	(0xf			<< MIDR_ARCHITECTURE_SHIFT) | \
	((partnum)		<< MIDR_PARTNUM_SHIFT))

@@ -80,6 +80,7 @@
#define ARM_CPU_PART_CORTEX_X1		0xD44
#define ARM_CPU_PART_CORTEX_A510	0xD46
#define ARM_CPU_PART_CORTEX_A710	0xD47
#define ARM_CPU_PART_CORTEX_A715	0xD4D
#define ARM_CPU_PART_CORTEX_X2		0xD48
#define ARM_CPU_PART_NEOVERSE_N2	0xD49
#define ARM_CPU_PART_CORTEX_A78C	0xD4B
@@ -123,6 +124,8 @@
#define APPLE_CPU_PART_M1_FIRESTORM_PRO	0x025
#define APPLE_CPU_PART_M1_ICESTORM_MAX	0x028
#define APPLE_CPU_PART_M1_FIRESTORM_MAX	0x029
#define APPLE_CPU_PART_M2_BLIZZARD	0x032
#define APPLE_CPU_PART_M2_AVALANCHE	0x033

#define AMPERE_CPU_PART_AMPERE1		0xAC3

@@ -142,6 +145,7 @@
#define MIDR_CORTEX_X1	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)
#define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
#define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715)
#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
#define MIDR_CORTEX_A78C	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
@@ -175,6 +179,8 @@
#define MIDR_APPLE_M1_FIRESTORM_PRO MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_PRO)
#define MIDR_APPLE_M1_ICESTORM_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_MAX)
#define MIDR_APPLE_M1_FIRESTORM_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_MAX)
#define MIDR_APPLE_M2_BLIZZARD MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD)
#define MIDR_APPLE_M2_AVALANCHE MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE)
#define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1)

/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */
+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@
#define __KVM_HAVE_VCPU_EVENTS

#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_DIRTY_LOG_PAGE_OFFSET 64

#define KVM_REG_SIZE(id)						\
	(1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
+5 −0
Original line number Diff line number Diff line
@@ -206,6 +206,8 @@ struct kvm_msr_list {
struct kvm_msr_filter_range {
#define KVM_MSR_FILTER_READ  (1 << 0)
#define KVM_MSR_FILTER_WRITE (1 << 1)
#define KVM_MSR_FILTER_RANGE_VALID_MASK (KVM_MSR_FILTER_READ | \
					 KVM_MSR_FILTER_WRITE)
	__u32 flags;
	__u32 nmsrs; /* number of msrs in bitmap */
	__u32 base;  /* MSR index the bitmap starts at */
@@ -214,8 +216,11 @@ struct kvm_msr_filter_range {

#define KVM_MSR_FILTER_MAX_RANGES 16
struct kvm_msr_filter {
#ifndef __KERNEL__
#define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
#endif
#define KVM_MSR_FILTER_DEFAULT_DENY  (1 << 0)
#define KVM_MSR_FILTER_VALID_MASK (KVM_MSR_FILTER_DEFAULT_DENY)
	__u32 flags;
	struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
};
+9 −0
Original line number Diff line number Diff line
@@ -79,4 +79,13 @@
#define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
#endif // static_assert


/*
 * Compile time check that field has an expected offset
 */
#define ASSERT_STRUCT_OFFSET(type, field, expected_offset)	\
	BUILD_BUG_ON_MSG(offsetof(type, field) != (expected_offset),	\
		"Offset of " #field " in " #type " has changed.")


#endif	/* _LINUX_BUILD_BUG_H */
+3 −0
Original line number Diff line number Diff line
@@ -1767,6 +1767,7 @@ struct kvm_xen_hvm_attr {
		__u8 runstate_update_flag;
		struct {
			__u64 gfn;
#define KVM_XEN_INVALID_GFN ((__u64)-1)
		} shared_info;
		struct {
			__u32 send_port;
@@ -1798,6 +1799,7 @@ struct kvm_xen_hvm_attr {
	} u;
};


/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */
#define KVM_XEN_ATTR_TYPE_LONG_MODE		0x0
#define KVM_XEN_ATTR_TYPE_SHARED_INFO		0x1
@@ -1823,6 +1825,7 @@ struct kvm_xen_vcpu_attr {
	__u16 pad[3];
	union {
		__u64 gpa;
#define KVM_XEN_INVALID_GPA ((__u64)-1)
		__u64 pad[8];
		struct {
			__u64 state;
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