Commit 49c1f332 authored by Marc Zyngier's avatar Marc Zyngier Committed by chenxiang
Browse files

KVM: arm64: vgic-v3: Make NMI priority RES0 

virt inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I97WGU

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/commit/?h=arm64/nmi&id=dd71b0c86caf07d2399ca3cd775b1d1720d5cfda



----------------------------------------------------------------

The priority of an NMI is always RES0. Let's enforce it when
the guest accesses the priority MMIO range.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Signed-off-by: default avatarXiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: default avatarcaijian <caijian11@h-partners.com>
parent 7b2984c4

arch/arm64/kvm/vgic/vgic-mmio.c

+14 −5
Original line number Diff line number Diff line
@@ -699,13 +699,17 @@ unsigned long vgic_mmio_read_priority(struct kvm_vcpu *vcpu, 
				      gpa_t addr, unsigned int len)

{

	u32 intid = VGIC_ADDR_TO_INTID(addr, 8);

	unsigned long flags;

	int i;

	u64 val = 0;



	for (i = 0; i < len; i++) {

		struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);



		raw_spin_lock_irqsave(&irq->irq_lock, flags);

		if (!irq->nmi)

			val |= (u64)irq->priority << (i * 8);

		raw_spin_unlock_irqrestore(&irq->irq_lock, flags);



		vgic_put_irq(vcpu->kvm, irq);

	}
@@ -732,10 +736,15 @@ void vgic_mmio_write_priority(struct kvm_vcpu *vcpu, 
		struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);



		raw_spin_lock_irqsave(&irq->irq_lock, flags);

		/* Narrow the priority range to what we actually support */

		if (!irq->nmi) {

			/*

			 * Narrow the priority range to what we

			 * actually support

			 */

			irq->priority = (val >> (i * 8)) & GENMASK(7, 8 - VGIC_PRI_BITS);

			if (vgic_direct_sgi_or_ppi(irq))

				vgic_update_vsgi(irq);

		}

		raw_spin_unlock_irqrestore(&irq->irq_lock, flags);



		vgic_put_irq(vcpu->kvm, irq);