Commit 49a72bb6 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Mauro Carvalho Chehab
Browse files

media: imx: imx7-media-csi: Merge all config in imx7_csi_configure() 



Merge all the configuration steps (imx7_csi_buf_stride_set(),
imx7_csi_deinterlace_enable(), imx7_csi_set_imagpara() and
imx7_csi_init_default()) in the imx7_csi_configure() function. This
simplifies the configuration procedure by removing most
read-update-write cycles, and makes the code generally more readable.

imx7_csi_init_default() is kept as it is also called from
imx7_csi_deinit(). This will be addressed separately.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarRui Miguel Silva <rmfrfs@gmail.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 5f09f37a

drivers/staging/media/imx/imx7-media-csi.c

+81 −107
Original line number Diff line number Diff line
@@ -305,23 +305,6 @@ static void imx7_csi_rx_fifo_clear(struct imx7_csi *csi) 
	imx7_csi_reg_write(csi, cr1 | BIT_FCC, CSI_CSICR1);

}



static void imx7_csi_buf_stride_set(struct imx7_csi *csi, u32 stride)

{

	imx7_csi_reg_write(csi, stride, CSI_CSIFBUF_PARA);

}



static void imx7_csi_deinterlace_enable(struct imx7_csi *csi, bool enable)

{

	u32 cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);



	if (enable)

		cr18 |= BIT_DEINTERLACE_EN;

	else

		cr18 &= ~BIT_DEINTERLACE_EN;



	imx7_csi_reg_write(csi, cr18, CSI_CSICR18);

}



static void imx7_csi_dmareq_rff_enable(struct imx7_csi *csi)

{

	u32 cr3 = imx7_csi_reg_read(csi, CSI_CSICR3);
@@ -348,21 +331,6 @@ static void imx7_csi_dmareq_rff_disable(struct imx7_csi *csi) 
	imx7_csi_reg_write(csi, cr3, CSI_CSICR3);

}



static void imx7_csi_set_imagpara(struct imx7_csi *csi, int width, int height)

{

	int imag_para;

	int rx_count;



	rx_count = (width * height) >> 2;

	imx7_csi_reg_write(csi, rx_count, CSI_CSIRXCNT);



	imag_para = BIT_IMAGE_WIDTH(width) | BIT_IMAGE_HEIGHT(height);

	imx7_csi_reg_write(csi, imag_para, CSI_CSIIMAG_PARA);



	/* reflash the embedded DMA controller */

	imx7_csi_dma_reflash(csi);

}



static void imx7_csi_sw_reset(struct imx7_csi *csi)

{

	imx7_csi_hw_disable(csi);
@@ -482,37 +450,33 @@ static void imx7_csi_configure(struct imx7_csi *csi) 
{

	struct imx_media_video_dev *vdev = csi->vdev;

	struct v4l2_pix_format *out_pix = &vdev->fmt;

	u32 cr1, cr18;

	int width = out_pix->width;

	u32 cr1, cr18;

	u32 stride;



	cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);



	if (out_pix->field == V4L2_FIELD_INTERLACED) {

		imx7_csi_deinterlace_enable(csi, true);

		imx7_csi_buf_stride_set(csi, out_pix->width);

		cr18 |= BIT_DEINTERLACE_EN;

		stride = out_pix->width;

	} else {

		imx7_csi_deinterlace_enable(csi, false);

		imx7_csi_buf_stride_set(csi, 0);

		cr18 &= ~BIT_DEINTERLACE_EN;

		stride = 0;

	}



	cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);



	if (!csi->is_csi2) {

		cr1 = BIT_SOF_POL | BIT_REDGE | BIT_GCLK_MODE | BIT_HSYNC_POL

		    | BIT_FCC | BIT_MCLKDIV(1) | BIT_MCLKEN;



		cr18 |= BIT_BASEADDR_SWITCH_EN | BIT_BASEADDR_SWITCH_SEL |

			BIT_BASEADDR_CHG_ERR_EN;



		if (out_pix->pixelformat == V4L2_PIX_FMT_UYVY ||

		    out_pix->pixelformat == V4L2_PIX_FMT_YUYV)

			width *= 2;



		imx7_csi_set_imagpara(csi, width, out_pix->height);



		cr18 |= (BIT_BASEADDR_SWITCH_EN | BIT_BASEADDR_SWITCH_SEL |

			BIT_BASEADDR_CHG_ERR_EN);

		imx7_csi_reg_write(csi, cr18, CSI_CSICR18);



		return;

	}



	imx7_csi_set_imagpara(csi, width, out_pix->height);



	cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);

	cr1 &= ~BIT_GCLK_MODE;

	} else {

		cr1 = BIT_SOF_POL | BIT_REDGE | BIT_HSYNC_POL | BIT_FCC

		    | BIT_MCLKDIV(1) | BIT_MCLKEN;



		cr18 &= BIT_MIPI_DATA_FORMAT_MASK;

		cr18 |= BIT_DATA_FROM_MIPI;
@@ -547,8 +511,8 @@ static void imx7_csi_configure(struct imx7_csi *csi) 
			cr18 |= BIT_MIPI_DATA_FORMAT_RAW14;

			break;

		/*

	 * CSI-2 sources are supposed to use the 1X16 formats, but not all of

	 * them comply. Support both variants.

		 * CSI-2 sources are supposed to use the 1X16 formats, but not

		 * all of them comply. Support both variants.

		 */

		case MEDIA_BUS_FMT_UYVY8_2X8:

		case MEDIA_BUS_FMT_UYVY8_1X16:
@@ -566,9 +530,21 @@ static void imx7_csi_configure(struct imx7_csi *csi) 
			cr1 |= BIT_PIXEL_BIT;

			break;

		}

	}



	imx7_csi_reg_write(csi, cr1, CSI_CSICR1);

	imx7_csi_reg_write(csi, 0, CSI_CSICR2);

	imx7_csi_reg_write(csi, BIT_FRMCNT_RST, CSI_CSICR3);

	imx7_csi_reg_write(csi, cr18, CSI_CSICR18);



	imx7_csi_reg_write(csi, (width * out_pix->height) >> 2, CSI_CSIRXCNT);

	imx7_csi_reg_write(csi, BIT_IMAGE_WIDTH(width) |

			   BIT_IMAGE_HEIGHT(out_pix->height),

			   CSI_CSIIMAG_PARA);

	imx7_csi_reg_write(csi, stride, CSI_CSIFBUF_PARA);



	/* reflash the embedded DMA controller */

	imx7_csi_dma_reflash(csi);

}



static int imx7_csi_init(struct imx7_csi *csi)
@@ -579,15 +555,13 @@ static int imx7_csi_init(struct imx7_csi *csi) 
	if (ret < 0)

		return ret;



	imx7_csi_init_default(csi);

	imx7_csi_configure(csi);

	imx7_csi_dmareq_rff_enable(csi);



	ret = imx7_csi_dma_setup(csi);

	if (ret < 0)

		return ret;



	imx7_csi_configure(csi);



	return 0;

}