Commit 4996c342 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2021-05-20' of... 

Merge tag 'drm-intel-fixes-2021-05-20' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

drm/i915 fixes for v5.13-rc3:
- Pin the L-shape quirked object as unshrinkable to fix crashes
- Disable HiZ Raw Stall Optimization on broken gen7 to fix glitches, gfx corruption
- GVT: Move mdev attribute groups into kvmgt module to fix kconfig deps issue

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87a6opehx6.fsf@intel.com
parents af8d80bf eddd1b8f

drivers/gpu/drm/i915/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -102,7 +102,6 @@ config DRM_I915_GVT 
	bool "Enable Intel GVT-g graphics virtualization host support"

	depends on DRM_I915

	depends on 64BIT

	depends on VFIO_MDEV=y || VFIO_MDEV=DRM_I915

	default n

	help

	  Choose this option if you want to enable Intel GVT-g graphics

drivers/gpu/drm/i915/gem/i915_gem_pages.c

+2 −0
Original line number Diff line number Diff line
@@ -63,6 +63,8 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj, 
	    i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) {

		GEM_BUG_ON(i915_gem_object_has_tiling_quirk(obj));

		i915_gem_object_set_tiling_quirk(obj);

		GEM_BUG_ON(!list_empty(&obj->mm.link));

		atomic_inc(&obj->mm.shrink_pin);

		shrinkable = false;

	}

drivers/gpu/drm/i915/gt/gen7_renderclear.c

+4 −1
Original line number Diff line number Diff line
@@ -397,7 +397,10 @@ static void emit_batch(struct i915_vma * const vma, 
	gen7_emit_pipeline_invalidate(&cmds);

	batch_add(&cmds, MI_LOAD_REGISTER_IMM(2));

	batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7));

	batch_add(&cmds, 0xffff0000);

	batch_add(&cmds, 0xffff0000 |

			((IS_IVB_GT1(i915) || IS_VALLEYVIEW(i915)) ?

			 HIZ_RAW_STALL_OPT_DISABLE :

			 0));

	batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1));

	batch_add(&cmds, 0xffff0000 | PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);

	gen7_emit_pipeline_invalidate(&cmds);

drivers/gpu/drm/i915/gvt/gvt.c

+2 −122
Original line number Diff line number Diff line
@@ -46,118 +46,6 @@ static const char * const supported_hypervisors[] = { 
	[INTEL_GVT_HYPERVISOR_KVM] = "KVM",

};



static struct intel_vgpu_type *

intel_gvt_find_vgpu_type(struct intel_gvt *gvt, unsigned int type_group_id)

{

	if (WARN_ON(type_group_id >= gvt->num_types))

		return NULL;

	return &gvt->types[type_group_id];

}



static ssize_t available_instances_show(struct mdev_type *mtype,

					struct mdev_type_attribute *attr,

					char *buf)

{

	struct intel_vgpu_type *type;

	unsigned int num = 0;

	void *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;



	type = intel_gvt_find_vgpu_type(gvt, mtype_get_type_group_id(mtype));

	if (!type)

		num = 0;

	else

		num = type->avail_instance;



	return sprintf(buf, "%u\n", num);

}



static ssize_t device_api_show(struct mdev_type *mtype,

			       struct mdev_type_attribute *attr, char *buf)

{

	return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);

}



static ssize_t description_show(struct mdev_type *mtype,

				struct mdev_type_attribute *attr, char *buf)

{

	struct intel_vgpu_type *type;

	void *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;



	type = intel_gvt_find_vgpu_type(gvt, mtype_get_type_group_id(mtype));

	if (!type)

		return 0;



	return sprintf(buf, "low_gm_size: %dMB\nhigh_gm_size: %dMB\n"

		       "fence: %d\nresolution: %s\n"

		       "weight: %d\n",

		       BYTES_TO_MB(type->low_gm_size),

		       BYTES_TO_MB(type->high_gm_size),

		       type->fence, vgpu_edid_str(type->resolution),

		       type->weight);

}



static MDEV_TYPE_ATTR_RO(available_instances);

static MDEV_TYPE_ATTR_RO(device_api);

static MDEV_TYPE_ATTR_RO(description);



static struct attribute *gvt_type_attrs[] = {

	&mdev_type_attr_available_instances.attr,

	&mdev_type_attr_device_api.attr,

	&mdev_type_attr_description.attr,

	NULL,

};



static struct attribute_group *gvt_vgpu_type_groups[] = {

	[0 ... NR_MAX_INTEL_VGPU_TYPES - 1] = NULL,

};



static bool intel_get_gvt_attrs(struct attribute_group ***intel_vgpu_type_groups)

{

	*intel_vgpu_type_groups = gvt_vgpu_type_groups;

	return true;

}



static int intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt)

{

	int i, j;

	struct intel_vgpu_type *type;

	struct attribute_group *group;



	for (i = 0; i < gvt->num_types; i++) {

		type = &gvt->types[i];



		group = kzalloc(sizeof(struct attribute_group), GFP_KERNEL);

		if (WARN_ON(!group))

			goto unwind;



		group->name = type->name;

		group->attrs = gvt_type_attrs;

		gvt_vgpu_type_groups[i] = group;

	}



	return 0;



unwind:

	for (j = 0; j < i; j++) {

		group = gvt_vgpu_type_groups[j];

		kfree(group);

	}



	return -ENOMEM;

}



static void intel_gvt_cleanup_vgpu_type_groups(struct intel_gvt *gvt)

{

	int i;

	struct attribute_group *group;



	for (i = 0; i < gvt->num_types; i++) {

		group = gvt_vgpu_type_groups[i];

		gvt_vgpu_type_groups[i] = NULL;

		kfree(group);

	}

}



static const struct intel_gvt_ops intel_gvt_ops = {

	.emulate_cfg_read = intel_vgpu_emulate_cfg_read,

	.emulate_cfg_write = intel_vgpu_emulate_cfg_write,
@@ -169,8 +57,6 @@ static const struct intel_gvt_ops intel_gvt_ops = { 
	.vgpu_reset = intel_gvt_reset_vgpu,

	.vgpu_activate = intel_gvt_activate_vgpu,

	.vgpu_deactivate = intel_gvt_deactivate_vgpu,

	.gvt_find_vgpu_type = intel_gvt_find_vgpu_type,

	.get_gvt_attrs = intel_get_gvt_attrs,

	.vgpu_query_plane = intel_vgpu_query_plane,

	.vgpu_get_dmabuf = intel_vgpu_get_dmabuf,

	.write_protect_handler = intel_vgpu_page_track_handler,
@@ -274,7 +160,6 @@ void intel_gvt_clean_device(struct drm_i915_private *i915) 
		return;



	intel_gvt_destroy_idle_vgpu(gvt->idle_vgpu);

	intel_gvt_cleanup_vgpu_type_groups(gvt);

	intel_gvt_clean_vgpu_types(gvt);



	intel_gvt_debugfs_clean(gvt);
@@ -363,12 +248,6 @@ int intel_gvt_init_device(struct drm_i915_private *i915) 
	if (ret)

		goto out_clean_thread;



	ret = intel_gvt_init_vgpu_type_groups(gvt);

	if (ret) {

		gvt_err("failed to init vgpu type groups: %d\n", ret);

		goto out_clean_types;

	}



	vgpu = intel_gvt_create_idle_vgpu(gvt);

	if (IS_ERR(vgpu)) {

		ret = PTR_ERR(vgpu);
@@ -454,7 +333,8 @@ EXPORT_SYMBOL_GPL(intel_gvt_register_hypervisor); 
void

intel_gvt_unregister_hypervisor(void)

{

	intel_gvt_hypervisor_host_exit(intel_gvt_host.dev);

	void *gvt = (void *)kdev_to_i915(intel_gvt_host.dev)->gvt;

	intel_gvt_hypervisor_host_exit(intel_gvt_host.dev, gvt);

	module_put(THIS_MODULE);

}

EXPORT_SYMBOL_GPL(intel_gvt_unregister_hypervisor);

drivers/gpu/drm/i915/gvt/gvt.h

+0 −3
Original line number Diff line number Diff line
@@ -574,9 +574,6 @@ struct intel_gvt_ops { 
	void (*vgpu_reset)(struct intel_vgpu *);

	void (*vgpu_activate)(struct intel_vgpu *);

	void (*vgpu_deactivate)(struct intel_vgpu *);

	struct intel_vgpu_type *(*gvt_find_vgpu_type)(

		struct intel_gvt *gvt, unsigned int type_group_id);

	bool (*get_gvt_attrs)(struct attribute_group ***intel_vgpu_type_groups);

	int (*vgpu_query_plane)(struct intel_vgpu *vgpu, void *);

	int (*vgpu_get_dmabuf)(struct intel_vgpu *vgpu, unsigned int);

	int (*write_protect_handler)(struct intel_vgpu *, u64, void *,