Commit 498e1652 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'imx-clk-5.6' of... 

Merge tag 'imx-clk-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx

Pull i.MX clk driver updates from Shawn Guo:

 - A series from Abel Vesa to do some trivial cleanups which will be
   helpful for i.MX clock driver switching to clk_hw based API
 - A series from Anson Huang to add i.MX8MP clock driver support
 - Disable non-functional divider between pll4_audio_div and
   pll4_post_div on imx6q
 - Fix watchdog2 clock name typo in imx7ulp clock driver
 - A couple of patches from Leonard Crestez to set CLK_GET_RATE_NOCACHE
   flag for DRAM related clocks on i.MX8M SoCs
 - Suppress bind attrs for i.MX8M clock driver to avoid the possibility
   of reloading the driver at runtime
 - Add a big comment in imx8qxp-lpcg driver to tell why
   devm_platform_ioremap_resource() shouldn't be used for the driver
 - A correction on i.MX8MN usb1_ctrl parent clock setting
 - A couple of trivial cleanup on clk-divider-gate driver
 - A series from Peng Fan to convert i.MX8M clock drivers to clk_hw
   based API

* tag 'imx-clk-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (32 commits)
  clk: imx: Add support for i.MX8MP clock driver
  dt-bindings: imx: Add clock binding doc for i.MX8MP
  clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based API
  clk: imx: imx8mq: Switch to clk_hw based API
  clk: imx: imx8mm: Switch to clk_hw based API
  clk: imx: imx8mn: Switch to clk_hw based API
  clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API
  clk: imx: gate3: Switch to clk_hw based API
  clk: imx: add hw API imx_clk_hw_mux2_flags
  clk: imx: add imx_unregister_hw_clocks
  clk: imx: clk-composite-8m: Switch to clk_hw based API
  clk: imx: clk-pll14xx: Switch to clk_hw based API
  clk: imx7up: Rename the clks to hws
  clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based
  clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw based
  clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based
  clk: imx: Rename sccg and frac pll register to suggest clk_hw
  clk: imx: imx7ulp composite: Rename to show is clk_hw based
  clk: imx: pllv2: Switch to clk_hw based API
  clk: imx: pllv1: Switch to clk_hw based API
  ...
parents e42617b8 9c140d99

Documentation/devicetree/bindings/clock/imx8mp-clock.yaml

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+68 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/bindings/clock/imx8mp-clock.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NXP i.MX8M Plus Clock Control Module Binding



maintainers:

  - Anson Huang <Anson.Huang@nxp.com>



description:

  NXP i.MX8M Plus clock control module is an integrated clock controller, which

  generates and supplies to all modules.



properties:

  compatible:

    const: fsl,imx8mp-ccm



  reg:

    maxItems: 1



  clocks:

    items:

      - description: 32k osc

      - description: 24m osc

      - description: ext1 clock input

      - description: ext2 clock input

      - description: ext3 clock input

      - description: ext4 clock input



  clock-names:

    items:

      - const: osc_32k

      - const: osc_24m

      - const: clk_ext1

      - const: clk_ext2

      - const: clk_ext3

      - const: clk_ext4



  '#clock-cells':

    const: 1

    description:

      The clock consumer should specify the desired clock by having the clock

      ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h

      for the full list of i.MX8M Plus clock IDs.



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - '#clock-cells'



examples:

  # Clock Control Module node:

  - |

    clk: clock-controller@30380000 {

        compatible = "fsl,imx8mp-ccm";

        reg = <0x30380000 0x10000>;

        #clock-cells = <1>;

        clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>,

                 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;

        clock-names = "osc_32k", "osc_24m", "clk_ext1",

                      "clk_ext2", "clk_ext3", "clk_ext4";

    };



...

drivers/clk/imx/Kconfig

+6 −0
Original line number Diff line number Diff line
@@ -20,6 +20,12 @@ config CLK_IMX8MN 
	help

	    Build the driver for i.MX8MN CCM Clock Driver



config CLK_IMX8MP

	bool "IMX8MP CCM Clock Driver"

	depends on ARCH_MXC && ARM64

	help

	    Build the driver for i.MX8MP CCM Clock Driver



config CLK_IMX8MQ

	bool "IMX8MQ CCM Clock Driver"

	depends on ARCH_MXC && ARM64

drivers/clk/imx/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ obj-$(CONFIG_MXC_CLK) += \ 
	clk-pllv2.o \

	clk-pllv3.o \

	clk-pllv4.o \

	clk-sccg-pll.o \

	clk-sscg-pll.o \

	clk-pll14xx.o



obj-$(CONFIG_MXC_CLK_SCU) += \
@@ -27,6 +27,7 @@ obj-$(CONFIG_MXC_CLK_SCU) += \ 


obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o

obj-$(CONFIG_CLK_IMX8MN) += clk-imx8mn.o

obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o

obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o

obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o

drivers/clk/imx/clk-composite-7ulp.c

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ 
#define PCG_PCD_WIDTH	3

#define PCG_PCD_MASK	0x7



struct clk_hw *imx7ulp_clk_composite(const char *name,

struct clk_hw *imx7ulp_clk_hw_composite(const char *name,

				     const char * const *parent_names,

				     int num_parents, bool mux_present,

				     bool rate_present, bool gate_present,

drivers/clk/imx/clk-composite-8m.c

+2 −2
Original line number Diff line number Diff line
@@ -123,7 +123,7 @@ static const struct clk_ops imx8m_clk_composite_divider_ops = { 
	.set_rate = imx8m_clk_composite_divider_set_rate,

};



struct clk *imx8m_clk_composite_flags(const char *name,

struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,

					const char * const *parent_names,

					int num_parents, void __iomem *reg,

					unsigned long flags)
@@ -169,7 +169,7 @@ struct clk *imx8m_clk_composite_flags(const char *name, 
	if (IS_ERR(hw))

		goto fail;



	return hw->clk;

	return hw;



fail:

	kfree(gate);