Commit 49200199 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Martin K. Petersen
Browse files

scsi: ufshcd: remove unused quirks 

Remove various quirks that don't have users, as well as the dead code keyed
off them.

Link: https://lore.kernel.org/r/20200221140812.476338-2-hch@lst.de


Reviewed-by: default avatarBart Van Assche <bvanassche@acm.org>
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 4cbca7ea

drivers/scsi/ufs/ufshcd.c

+12 −107
Original line number Diff line number Diff line
@@ -645,11 +645,7 @@ static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp) 
 */

static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)

{

	if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)

		ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);

	else

		ufshcd_writel(hba, ~(1 << pos),

				REG_UTP_TRANSFER_REQ_LIST_CLEAR);

	ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);

}



/**
@@ -659,9 +655,6 @@ static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos) 
 */

static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)

{

	if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)

		ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);

	else

	ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);

}
@@ -2101,13 +2094,8 @@ static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp) 
		return sg_segments;



	if (sg_segments) {

		if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)

		lrbp->utr_descriptor_ptr->prd_table_length =

				cpu_to_le16((u16)(sg_segments *

					sizeof(struct ufshcd_sg_entry)));

		else

			lrbp->utr_descriptor_ptr->prd_table_length =

				cpu_to_le16((u16) (sg_segments));

			cpu_to_le16((u16)sg_segments);



		prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
@@ -3436,21 +3424,11 @@ static void ufshcd_host_memory_configure(struct ufs_hba *hba) 
				cpu_to_le32(upper_32_bits(cmd_desc_element_addr));



		/* Response upiu and prdt offset should be in double words */

		if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {

		utrdlp[i].response_upiu_offset =

				cpu_to_le16(response_offset);

			utrdlp[i].prd_table_offset =

				cpu_to_le16(prdt_offset);

			utrdlp[i].response_upiu_length =

				cpu_to_le16(ALIGNED_UPIU_SIZE);

		} else {

			utrdlp[i].response_upiu_offset =

				cpu_to_le16((response_offset >> 2));

			utrdlp[i].prd_table_offset =

				cpu_to_le16((prdt_offset >> 2));

			cpu_to_le16(response_offset >> 2);

		utrdlp[i].prd_table_offset = cpu_to_le16(prdt_offset >> 2);

		utrdlp[i].response_upiu_length =

			cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);

		}



		hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);

		hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
@@ -3493,52 +3471,6 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba) 
			"dme-link-startup: error code %d\n", ret);

	return ret;

}

/**

 * ufshcd_dme_reset - UIC command for DME_RESET

 * @hba: per adapter instance

 *

 * DME_RESET command is issued in order to reset UniPro stack.

 * This function now deal with cold reset.

 *

 * Returns 0 on success, non-zero value on failure

 */

static int ufshcd_dme_reset(struct ufs_hba *hba)

{

	struct uic_command uic_cmd = {0};

	int ret;



	uic_cmd.command = UIC_CMD_DME_RESET;



	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);

	if (ret)

		dev_err(hba->dev,

			"dme-reset: error code %d\n", ret);



	return ret;

}



/**

 * ufshcd_dme_enable - UIC command for DME_ENABLE

 * @hba: per adapter instance

 *

 * DME_ENABLE command is issued in order to enable UniPro stack.

 *

 * Returns 0 on success, non-zero value on failure

 */

static int ufshcd_dme_enable(struct ufs_hba *hba)

{

	struct uic_command uic_cmd = {0};

	int ret;



	uic_cmd.command = UIC_CMD_DME_ENABLE;



	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);

	if (ret)

		dev_err(hba->dev,

			"dme-reset: error code %d\n", ret);



	return ret;

}



static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)

{
@@ -4250,7 +4182,7 @@ static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep) 
}



/**

 * ufshcd_hba_execute_hce - initialize the controller

 * ufshcd_hba_enable - initialize the controller

 * @hba: per adapter instance

 *

 * The controller resets itself and controller firmware initialization
@@ -4259,7 +4191,7 @@ static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep) 
 *

 * Returns 0 on success, non-zero value on failure

 */

static int ufshcd_hba_execute_hce(struct ufs_hba *hba)

int ufshcd_hba_enable(struct ufs_hba *hba)

{

	int retry;
@@ -4307,32 +4239,6 @@ static int ufshcd_hba_execute_hce(struct ufs_hba *hba) 


	return 0;

}



int ufshcd_hba_enable(struct ufs_hba *hba)

{

	int ret;



	if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {

		ufshcd_set_link_off(hba);

		ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);



		/* enable UIC related interrupts */

		ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);

		ret = ufshcd_dme_reset(hba);

		if (!ret) {

			ret = ufshcd_dme_enable(hba);

			if (!ret)

				ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);

			if (ret)

				dev_err(hba->dev,

					"Host controller enable failed with non-hce\n");

		}

	} else {

		ret = ufshcd_hba_execute_hce(hba);

	}



	return ret;

}

EXPORT_SYMBOL_GPL(ufshcd_hba_enable);



static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
@@ -4909,8 +4815,7 @@ static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba) 
	 * false interrupt if device completes another request after resetting

	 * aggregation and before reading the DB.

	 */

	if (ufshcd_is_intr_aggr_allowed(hba) &&

	    !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))

	if (ufshcd_is_intr_aggr_allowed(hba))

		ufshcd_reset_intr_aggr(hba);



	tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);

drivers/scsi/ufs/ufshcd.h

+0 −22
Original line number Diff line number Diff line
@@ -613,28 +613,6 @@ struct ufs_hba { 
	 */

	#define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION		0x20



	/*

	 * This quirk needs to be enabled if the host contoller regards

	 * resolution of the values of PRDTO and PRDTL in UTRD as byte.

	 */

	#define UFSHCD_QUIRK_PRDT_BYTE_GRAN			0x80



	/*

	 * Clear handling for transfer/task request list is just opposite.

	 */

	#define UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR		0x100



	/*

	 * This quirk needs to be enabled if host controller doesn't allow

	 * that the interrupt aggregation timer and counter are reset by s/w.

	 */

	#define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR		0x200



	/*

	 * This quirks needs to be enabled if host controller cannot be

	 * enabled via HCE register.

	 */

	#define UFSHCI_QUIRK_BROKEN_HCE				0x400

	unsigned int quirks;	/* Deviations from standard UFSHCI spec. */



	/* Device deviations from standard UFS device spec. */