Commit 489e9fea authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pci-v5.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci 

Pull PCI updates from Bjorn Helgaas:
 "Enumeration:
   - Decode PCIe 64 GT/s link speed (Gustavo Pimentel)
   - Remove unused HAVE_PCI_SET_MWI (Heiner Kallweit)
   - Reduce pci_set_cacheline_size() message to debug level (Heiner
     Kallweit)
   - Fix pci_slot_release() NULL pointer dereference (Jubin Zhong)
   - Unify ECAM constants in native PCI Express drivers (Krzysztof
     Wilczyński)
   - Return u8 from pci_find_capability() and similar (Puranjay Mohan)
   - Return u16 from pci_find_ext_capability() and similar (Bjorn
     Helgaas)
   - Fix ACPI companion lookup for device 0 on the root bus (Rafael J.
     Wysocki)

  Resource management:
   - Keep both device and resource name for config space remaps
     (Alexander Lobakin)
   - Bounds-check command-line resource alignment requests (Bjorn
     Helgaas)
   - Fix overflow in command-line resource alignment requests (Colin Ian
     King)

  Driver binding:
   - Avoid duplicate IDs in driver dynamic IDs list (Zhenzhong Duan)

  Power management:
   - Save/restore Precision Time Measurement Capability for
     suspend/resume (David E. Box)
   - Disable PTM during suspend to save power (David E. Box)
   - Add sysfs attribute for device power state (Maximilian Luz)
   - Rename pci_wakeup_bus() to pci_resume_bus() (Mika Westerberg)
   - Do not generate wakeup event when runtime resuming device (Mika
     Westerberg)
   - Save/restore ASPM L1SS Capability for suspend/resume (Vidya Sagar)

  Virtualization:
   - Mark AMD Raven iGPU ATS as broken in some platforms (Alex Deucher)
   - Add function 1 DMA alias quirk for Marvell 9215 SATA controller
     (Bjorn Helgaas)

  MSI:
   - Disable MSI for Pericom PCIe-USB adapter (Andy Shevchenko)
   - Improve warnings for 32-bit-limited MSI support (Vidya Sagar)

  Error handling:
   - Cache RCEC EA Capability offset in pci_init_capabilities() (Sean V
     Kelley)
   - Rename reset_link() to reset_subordinates() (Sean V Kelley)
   - Write AER Capability only when we control it (Sean V Kelley)
   - Clear AER status only when we control AER (Sean V Kelley)
   - Bind RCEC devices to the Root Port driver (Qiuxu Zhuo)
   - Recover from RCiEP AER errors (Qiuxu Zhuo)
   - Recover from RCEC AER errors (Sean V Kelley)
   - Add pcie_link_rcec() to associate RCiEPs (Sean V Kelley)
   - Add pcie_walk_rcec() to RCEC AER handling (Sean V Kelley)
   - Add pcie_walk_rcec() to RCEC PME handling (Sean V Kelley)
   - Add RCEC AER error injection support (Qiuxu Zhuo)

  Broadcom iProc PCIe controller driver:
   - Fix out-of-bound array accesses (Bharat Gooty)
   - Invalidate correct PAXB inbound windows (Roman Bacik)
   - Enhance PCIe Link information display (Srinath Mannam)

  Cadence PCIe controller driver:
   - Make "cdns,max-outbound-regions" property optional (Kishon Vijay
     Abraham I)

  Intel VMD host bridge driver:
   - Offset client MSI-X vectors (Jon Derrick)
   - Update type of __iomem pointers (Krzysztof Wilczyński)

  NVIDIA Tegra PCIe controller driver:
   - Move "dbi" accesses to post common DWC initialization (Vidya Sagar)
   - Read "dbi" base address to program in application logic (Vidya
     Sagar)
   - Fix ASPM-L1SS advertisement disable code (Vidya Sagar)
   - Set DesignWare IP version (Vidya Sagar)
   - Continue unconfig sequence even if parts fail (Vidya Sagar)
   - Check return value of tegra_pcie_init_controller() (Vidya Sagar)
   - Disable LTSSM during L2 entry (Vidya Sagar)

  Qualcomm PCIe controller driver:
   - Document PCIe bindings for SM8250 SoC (Manivannan Sadhasivam)
   - Add SM8250 SoC support (Manivannan Sadhasivam)
   - Add support for configuring BDF to SID mapping for SM8250
     (Manivannan Sadhasivam)

  Renesas R-Car PCIe controller driver:
   - rcar: Drop unused members from struct rcar_pcie_host (Lad
     Prabhakar)
   - PCI: rcar-pci-host: Document r8a774e1 bindings (Lad Prabhakar)
   - PCI: rcar-pci-host: Convert bindings to json-schema (Yoshihiro
     Shimoda)
   - PCI: rcar-pci-host: Document r8a77965 bindings (Yoshihiro Shimoda)

  Samsung Exynos PCIe controller driver:
   - Rework driver to support Exynos5433 PCIe PHY (Jaehoon Chung)
   - Rework driver to support Exynos5433 variant (Jaehoon Chung)
   - Drop samsung,exynos5440-pcie binding (Marek Szyprowski)
   - Add the samsung,exynos-pcie binding (Marek Szyprowski)
   - Add the samsung,exynos-pcie-phy binding (Marek Szyprowski)

  Synopsys DesignWare PCIe controller driver:
   - Support multiple ATU memory regions (Rob Herring)
   - Move intel-gw ATU offset out of driver match data (Rob Herring)
   - Move "dbi", "dbi2", and "addr_space" resource setup into common
     code (Rob Herring)
   - Remove intel-gw unneeded function wrappers (Rob Herring)
   - Ensure all outbound ATU windows are reset (Rob Herring)
   - Use the common MSI irq_chip in dra7xx (Rob Herring)
   - Drop the .set_num_vectors() host op (Rob Herring)
   - Move MSI interrupt setup into DWC common code (Rob Herring)
   - Rework MSI initialization (Rob Herring)
   - Move link handling into common code (Rob Herring)
   - Move dw_pcie_msi_init() into core (Rob Herring)
   - Move dw_pcie_setup_rc() to DWC common code (Rob Herring)
   - Remove unnecessary wrappers around dw_pcie_host_init() (Rob
     Herring)
   - Drop keystone duplicated 'num-viewport'" (Rob Herring)
   - Move inbound and outbound windows to common struct (Rob Herring)
   - Detect number of iATU windows (Rob Herring)
   - Warn if non-prefetchable memory aperture size is > 32-bit (Vidya
     Sagar)
   - Add support to program ATU for >4GB memory (Vidya Sagar)
   - Set 32-bit DMA mask for MSI target address allocation (Vidya Sagar)

  TI J721E PCIe driver:
   - Fix "ti,syscon-pcie-ctrl" to take argument (Kishon Vijay Abraham I)
   - Add host mode dt-bindings for TI's J7200 SoC (Kishon Vijay Abraham
     I)
   - Add EP mode dt-bindings for TI's J7200 SoC (Kishon Vijay Abraham I)
   - Get offset within "syscon" from "ti,syscon-pcie-ctrl" phandle arg
     (Kishon Vijay Abraham I)

  TI Keystone PCIe controller driver:
   - Enable compile-testing on !ARM (Alex Dewar)"

* tag 'pci-v5.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (100 commits)
  PCI: Add function 1 DMA alias quirk for Marvell 9215 SATA controller
  PCI/ACPI: Fix companion lookup for device 0 on the root bus
  PCI: Keep both device and resource name for config space remaps
  PCI: xgene: Removed unused ".bus_shift" initialisers from pci-xgene.c
  PCI: vmd: Update type of the __iomem pointers
  PCI: iproc: Convert to use the new ECAM constants
  PCI: thunder-pem: Add constant for custom ".bus_shift" initialiser
  PCI: Unify ECAM constants in native PCI Express drivers
  PCI: Disable PTM during suspend to save power
  PCI/PTM: Save/restore Precision Time Measurement Capability for suspend/resume
  PCI: Mark AMD Raven iGPU ATS as broken in some platforms
  PCI: j721e: Get offset within "syscon" from "ti,syscon-pcie-ctrl" phandle arg
  dt-bindings: PCI: Add EP mode dt-bindings for TI's J7200 SoC
  dt-bindings: PCI: Add host mode dt-bindings for TI's J7200 SoC
  dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument
  PCI: dwc: Set 32-bit DMA mask for MSI target address allocation
  PCI: qcom: Add support for configuring BDF to SID mapping for SM8250
  PCI: Reduce pci_set_cacheline_size() message to debug level
  PCI: Remove unused HAVE_PCI_SET_MWI
  PCI: qcom: Add SM8250 SoC support
  ...
parents aab7ce2b 255b2d52

Documentation/ABI/testing/sysfs-bus-pci

+9 −0
Original line number Diff line number Diff line
@@ -366,3 +366,12 @@ Contact: Heiner Kallweit <hkallweit1@gmail.com> 
Description:	If ASPM is supported for an endpoint, these files can be

		used to disable or enable the individual power management

		states. Write y/1/on to enable, n/0/off to disable.



What:		/sys/bus/pci/devices/.../power_state

Date:		November 2020

Contact:	Linux PCI developers <linux-pci@vger.kernel.org>

Description:

		This file contains the current PCI power state of the device.

		The value comes from the PCI kernel device state and can be one

		of: "unknown", "error", "D0", D1", "D2", "D3hot", "D3cold".

		The file is read only.

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml

+0 −3
Original line number Diff line number Diff line
@@ -20,7 +20,4 @@ properties: 
    maximum: 32

    default: 32



required:

  - cdns,max-outbound-regions



additionalProperties: true

Documentation/devicetree/bindings/pci/qcom,pcie.txt

+4 −2
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
			- "qcom,pcie-ipq8074" for ipq8074

			- "qcom,pcie-qcs404" for qcs404

			- "qcom,pcie-sdm845" for sdm845

			- "qcom,pcie-sm8250" for sm8250



- reg:

	Usage: required
@@ -27,6 +28,7 @@ 
			- "dbi"	   DesignWare PCIe registers

			- "elbi"   External local bus interface registers

			- "config" PCIe configuration space

			- "atu"    ATU address space (optional)



- device_type:

	Usage: required
@@ -131,7 +133,7 @@ 
			- "slave_bus"	AXI Slave clock



-clock-names:

	Usage: required for sdm845

	Usage: required for sdm845 and sm8250

	Value type: <stringlist>

	Definition: Should contain the following entries

			- "aux"		Auxiliary clock
@@ -206,7 +208,7 @@ 
			- "ahb"			AHB reset



- reset-names:

	Usage: required for sdm845

	Usage: required for sdm845 and sm8250

	Value type: <stringlist>

	Definition: Should contain the following entries

			- "pci"			PCIe core reset

Documentation/devicetree/bindings/pci/rcar-pci-host.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) 2020 Renesas Electronics Corp.

%YAML 1.2

---

$id: http://devicetree.org/schemas/pci/rcar-pci-host.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Renesas R-Car PCIe Host



maintainers:

  - Marek Vasut <marek.vasut+renesas@gmail.com>

  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>



allOf:

  - $ref: pci-bus.yaml#



properties:

  compatible:

    oneOf:

      - items:

          - enum:

              - renesas,pcie-r8a7742      # RZ/G1H

              - renesas,pcie-r8a7743      # RZ/G1M

              - renesas,pcie-r8a7744      # RZ/G1N

              - renesas,pcie-r8a7790      # R-Car H2

              - renesas,pcie-r8a7791      # R-Car M2-W

              - renesas,pcie-r8a7793      # R-Car M2-N

          - const: renesas,pcie-rcar-gen2 # R-Car Gen2 and RZ/G1

      - items:

          - enum:

              - renesas,pcie-r8a774a1     # RZ/G2M

              - renesas,pcie-r8a774b1     # RZ/G2N

              - renesas,pcie-r8a774c0     # RZ/G2E

              - renesas,pcie-r8a774e1     # RZ/G2H

              - renesas,pcie-r8a7795      # R-Car H3

              - renesas,pcie-r8a7796      # R-Car M3-W

              - renesas,pcie-r8a77961     # R-Car M3-W+

              - renesas,pcie-r8a77965     # R-Car M3-N

              - renesas,pcie-r8a77980     # R-Car V3H

              - renesas,pcie-r8a77990     # R-Car E3

          - const: renesas,pcie-rcar-gen3 # R-Car Gen3 and RZ/G2



  reg:

    maxItems: 1



  interrupts:

    minItems: 3

    maxItems: 3



  clocks:

    maxItems: 2



  clock-names:

    items:

      - const: pcie

      - const: pcie_bus



  power-domains:

    maxItems: 1



  resets:

    maxItems: 1



  phys:

    maxItems: 1



  phy-names:

    const: pcie



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - power-domains

  - resets



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/power/r8a7791-sysc.h>



    soc {

        #address-cells = <2>;

        #size-cells = <2>;



        pcie: pcie@fe000000 {

            compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";

            reg = <0 0xfe000000 0 0x80000>;

             #address-cells = <3>;

             #size-cells = <2>;

             bus-range = <0x00 0xff>;

             device_type = "pci";

             ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,

                      <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,

                      <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,

                      <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;

             dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>,

                          <0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;

             interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,

                          <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,

                          <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;

             #interrupt-cells = <1>;

             interrupt-map-mask = <0 0 0 0>;

             interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

             clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;

             clock-names = "pcie", "pcie_bus";

             power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;

             resets = <&cpg 319>;

         };

    };

Documentation/devicetree/bindings/pci/rcar-pci.txt

deleted100644 → 0
+0 −72
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* Renesas R-Car PCIe interface



Required properties:

compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC;

	    "renesas,pcie-r8a7743" for the R8A7743 SoC;

	    "renesas,pcie-r8a7744" for the R8A7744 SoC;

	    "renesas,pcie-r8a774a1" for the R8A774A1 SoC;

	    "renesas,pcie-r8a774b1" for the R8A774B1 SoC;

	    "renesas,pcie-r8a774c0" for the R8A774C0 SoC;

	    "renesas,pcie-r8a7779" for the R8A7779 SoC;

	    "renesas,pcie-r8a7790" for the R8A7790 SoC;

	    "renesas,pcie-r8a7791" for the R8A7791 SoC;

	    "renesas,pcie-r8a7793" for the R8A7793 SoC;

	    "renesas,pcie-r8a7795" for the R8A7795 SoC;

	    "renesas,pcie-r8a7796" for the R8A77960 SoC;

	    "renesas,pcie-r8a77961" for the R8A77961 SoC;

	    "renesas,pcie-r8a77980" for the R8A77980 SoC;

	    "renesas,pcie-r8a77990" for the R8A77990 SoC;

	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or

				     RZ/G1 compatible device.

	    "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 or

				     RZ/G2 compatible device.



	    When compatible with the generic version, nodes must list the

	    SoC-specific version corresponding to the platform first

	    followed by the generic version.



- reg: base address and length of the PCIe controller registers.

- #address-cells: set to <3>

- #size-cells: set to <2>

- bus-range: PCI bus numbers covered

- device_type: set to "pci"

- ranges: ranges for the PCI memory and I/O regions.

- dma-ranges: ranges for the inbound memory regions.

- interrupts: two interrupt sources for MSI interrupts, followed by interrupt

	source for hardware related interrupts (e.g. link speed change).

- #interrupt-cells: set to <1>

- interrupt-map-mask and interrupt-map: standard PCI properties

	to define the mapping of the PCIe interface to interrupt numbers.

- clocks: from common clock binding: clock specifiers for the PCIe controller

	and PCIe bus clocks.

- clock-names: from common clock binding: should be "pcie" and "pcie_bus".



Optional properties:

- phys: from common PHY binding: PHY phandle and specifier (only make sense

	for R-Car gen3 SoCs where the PCIe PHYs have their own register blocks).

- phy-names: from common PHY binding: should be "pcie".



Example:



SoC-specific DT Entry:



	pcie: pcie@fe000000 {

		compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";

		reg = <0 0xfe000000 0 0x80000>;

		#address-cells = <3>;

		#size-cells = <2>;

		bus-range = <0x00 0xff>;

		device_type = "pci";

		ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000

			  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000

			  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000

			  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;

		dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000

			      0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;

		interrupts = <0 116 4>, <0 117 4>, <0 118 4>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0>;

		interrupt-map = <0 0 0 0 &gic 0 116 4>;

		clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>;

		clock-names = "pcie", "pcie_bus";

	};