Commit 483e3d87 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

Revert "drm/i915/display: Re-add check for low voltage sku for max dp source rate" 

This reverts commit d5929835.

With the Parade PS8461E MUX workaround (WaEdpLinkRateDataReload)
implemented we can get finally rid of the is_low_voltage_sku()
check that incorrectly prevents many machines from using the
8.1Gpbs link rate.

Cc: Jason A. Donenfeld <Jason@zx2c4.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5272
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6323
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6205


Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902070319.15395-2-ville.syrjala@linux.intel.com


Tested-by: default avatarAaron Ma <aaron.ma@canonical.com>
Tested-by: default avatarJason A. Donenfeld <Jason@zx2c4.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 25899c59

drivers/gpu/drm/i915/display/intel_dp.c

+3 −29
Original line number Diff line number Diff line
@@ -389,23 +389,13 @@ static int dg2_max_source_rate(struct intel_dp *intel_dp) 
	return intel_dp_is_edp(intel_dp) ? 810000 : 1350000;

}



static bool is_low_voltage_sku(struct drm_i915_private *i915, enum phy phy)

{

	u32 voltage;



	voltage = intel_de_read(i915, ICL_PORT_COMP_DW3(phy)) & VOLTAGE_INFO_MASK;



	return voltage == VOLTAGE_INFO_0_85V;

}



static int icl_max_source_rate(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);

	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);



	if (intel_phy_is_combo(dev_priv, phy) &&

	    (is_low_voltage_sku(dev_priv, phy) || !intel_dp_is_edp(intel_dp)))

	if (intel_phy_is_combo(dev_priv, phy) && !intel_dp_is_edp(intel_dp))

		return 540000;



	return 810000;
@@ -413,23 +403,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp) 


static int ehl_max_source_rate(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);

	enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port);



	if (intel_dp_is_edp(intel_dp) || is_low_voltage_sku(dev_priv, phy))

		return 540000;



	return 810000;

}



static int dg1_max_source_rate(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);

	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);



	if (intel_phy_is_combo(i915, phy) && is_low_voltage_sku(i915, phy))

	if (intel_dp_is_edp(intel_dp))

		return 540000;



	return 810000;
@@ -491,7 +465,7 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp) 
			max_rate = dg2_max_source_rate(intel_dp);

		else if (IS_ALDERLAKE_P(dev_priv) || IS_ALDERLAKE_S(dev_priv) ||

			 IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))

			max_rate = dg1_max_source_rate(intel_dp);

			max_rate = 810000;

		else if (IS_JSL_EHL(dev_priv))

			max_rate = ehl_max_source_rate(intel_dp);

		else