Commit 482d7b58 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-msm-next-2022-03-08' of https://gitlab.freedesktop.org/drm/msm into drm-next 



Follow-up pull req for v5.18 to pull in some important fixes.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvwHFHEd+9df-0aBOCfmw+ULvTS3f18sJuq_cvGKLDSjw@mail.gmail.com
parents e6700703 05afd57f

Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml

+2 −2
Original line number Diff line number Diff line
@@ -155,7 +155,7 @@ examples: 
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/power/qcom-rpmpd.h>



    display-subsystem@c900000 {

    mdss: display-subsystem@c900000 {

        compatible = "qcom,msm8998-mdss";

        reg = <0x0c900000 0x1000>;

        reg-names = "mdss";
@@ -192,7 +192,7 @@ examples: 
            clock-names = "iface", "bus", "mnoc", "core", "vsync";



            interrupt-parent = <&mdss>;

            interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;

            interrupts = <0>;

            operating-points-v2 = <&mdp_opp_table>;

            power-domains = <&rpmpd MSM8998_VDDMX>;

Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml

+3 −2
Original line number Diff line number Diff line
@@ -197,7 +197,7 @@ examples: 
                power-domains = <&rpmpd QCM2290_VDDCX>;



                interrupt-parent = <&mdss>;

                interrupts = <0 IRQ_TYPE_NONE>;

                interrupts = <0>;



                ports {

                        #address-cells = <1>;
@@ -211,4 +211,5 @@ examples: 
                        };

                };

         };

    };

...

drivers/gpu/drm/msm/adreno/a2xx.xml.h

+13 −13
Original line number Diff line number Diff line
@@ -8,19 +8,19 @@ This file was generated by the rules-ng-ng headergen tool in this git repository 
git clone https://github.com/freedreno/envytools.git



The rules-ng-ng source files this header was generated from are:

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno.xml                     (    594 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml        (   1572 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a2xx.xml                (  90810 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_common.xml       (  14386 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_pm4.xml          (  67699 bytes, from 2021-05-31 20:21:57)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a3xx.xml                (  84226 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a4xx.xml                ( 112551 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a5xx.xml                ( 150713 bytes, from 2021-06-10 22:34:02)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a6xx.xml                ( 180049 bytes, from 2021-06-02 21:44:19)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a6xx_gmu.xml            (  11331 bytes, from 2021-05-21 19:18:08)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/ocmem.xml               (   1773 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_control_regs.xml (   6038 bytes, from 2021-05-27 20:22:36)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_pipe_regs.xml    (   2924 bytes, from 2021-05-27 20:18:13)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno.xml                     (    594 bytes, from 2021-01-30 18:25:22)

- /home/robclark/tmp/mesa/src/freedreno/registers/freedreno_copyright.xml        (   1572 bytes, from 2020-12-31 19:26:32)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a2xx.xml                (  90810 bytes, from 2021-06-21 15:24:24)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/adreno_common.xml       (  14609 bytes, from 2021-11-24 23:05:10)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/adreno_pm4.xml          (  69086 bytes, from 2022-03-03 16:41:33)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a3xx.xml                (  84231 bytes, from 2021-11-24 23:05:10)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a4xx.xml                ( 113358 bytes, from 2022-01-31 23:06:21)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a5xx.xml                ( 149512 bytes, from 2022-01-31 23:06:21)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a6xx.xml                ( 184954 bytes, from 2022-03-03 16:41:33)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a6xx_gmu.xml            (  11331 bytes, from 2021-07-22 15:21:56)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/ocmem.xml               (   1773 bytes, from 2021-01-30 18:25:22)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/adreno_control_regs.xml (   6038 bytes, from 2021-07-22 15:21:56)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/adreno_pipe_regs.xml    (   2924 bytes, from 2021-07-22 15:21:56)



Copyright (C) 2013-2021 by the following authors:

- Rob Clark <robdclark@gmail.com> (robclark)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

+1 −0
Original line number Diff line number Diff line
@@ -471,6 +471,7 @@ static u32 a2xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) 
static const struct adreno_gpu_funcs funcs = {

	.base = {

		.get_param = adreno_get_param,

		.set_param = adreno_set_param,

		.hw_init = a2xx_hw_init,

		.pm_suspend = msm_gpu_pm_suspend,

		.pm_resume = msm_gpu_pm_resume,

drivers/gpu/drm/msm/adreno/a3xx.xml.h

+15 −15
Original line number Diff line number Diff line
@@ -8,19 +8,19 @@ This file was generated by the rules-ng-ng headergen tool in this git repository 
git clone https://github.com/freedreno/envytools.git



The rules-ng-ng source files this header was generated from are:

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno.xml                     (    594 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml        (   1572 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a2xx.xml                (  90810 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_common.xml       (  14386 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_pm4.xml          (  67699 bytes, from 2021-05-31 20:21:57)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a3xx.xml                (  84226 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a4xx.xml                ( 112551 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a5xx.xml                ( 150713 bytes, from 2021-06-10 22:34:02)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a6xx.xml                ( 180049 bytes, from 2021-06-02 21:44:19)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a6xx_gmu.xml            (  11331 bytes, from 2021-05-21 19:18:08)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/ocmem.xml               (   1773 bytes, from 2021-02-18 16:45:44)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_control_regs.xml (   6038 bytes, from 2021-05-27 20:22:36)

- /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/adreno_pipe_regs.xml    (   2924 bytes, from 2021-05-27 20:18:13)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno.xml                     (    594 bytes, from 2021-01-30 18:25:22)

- /home/robclark/tmp/mesa/src/freedreno/registers/freedreno_copyright.xml        (   1572 bytes, from 2020-12-31 19:26:32)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a2xx.xml                (  90810 bytes, from 2021-06-21 15:24:24)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/adreno_common.xml       (  14609 bytes, from 2021-11-24 23:05:10)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/adreno_pm4.xml          (  69086 bytes, from 2022-03-03 16:41:33)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a3xx.xml                (  84231 bytes, from 2021-11-24 23:05:10)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a4xx.xml                ( 113358 bytes, from 2022-01-31 23:06:21)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a5xx.xml                ( 149512 bytes, from 2022-01-31 23:06:21)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a6xx.xml                ( 184954 bytes, from 2022-03-03 16:41:33)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/a6xx_gmu.xml            (  11331 bytes, from 2021-07-22 15:21:56)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/ocmem.xml               (   1773 bytes, from 2021-01-30 18:25:22)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/adreno_control_regs.xml (   6038 bytes, from 2021-07-22 15:21:56)

- /home/robclark/tmp/mesa/src/freedreno/registers/adreno/adreno_pipe_regs.xml    (   2924 bytes, from 2021-07-22 15:21:56)



Copyright (C) 2013-2021 by the following authors:

- Rob Clark <robdclark@gmail.com> (robclark)
@@ -1466,7 +1466,7 @@ static inline uint32_t A3XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endi 


#define REG_A3XX_RB_DEPTH_CONTROL				0x00002100

#define A3XX_RB_DEPTH_CONTROL_FRAG_WRITES_Z			0x00000001

#define A3XX_RB_DEPTH_CONTROL_Z_ENABLE				0x00000002

#define A3XX_RB_DEPTH_CONTROL_Z_TEST_ENABLE			0x00000002

#define A3XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE			0x00000004

#define A3XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE			0x00000008

#define A3XX_RB_DEPTH_CONTROL_ZFUNC__MASK			0x00000070
@@ -1476,7 +1476,7 @@ static inline uint32_t A3XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val) 
	return ((val) << A3XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) & A3XX_RB_DEPTH_CONTROL_ZFUNC__MASK;

}

#define A3XX_RB_DEPTH_CONTROL_Z_CLAMP_ENABLE			0x00000080

#define A3XX_RB_DEPTH_CONTROL_Z_TEST_ENABLE			0x80000000

#define A3XX_RB_DEPTH_CONTROL_Z_READ_ENABLE			0x80000000



#define REG_A3XX_RB_DEPTH_CLEAR					0x00002101