Loading arch/powerpc/include/asm/asm-prototypes.h +3 −0 Original line number Diff line number Diff line Loading @@ -134,4 +134,7 @@ unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip); void pnv_power9_force_smt4_catch(void); void pnv_power9_force_smt4_release(void); void tm_enable(void); void tm_disable(void); void tm_abort(uint8_t cause); #endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */ arch/powerpc/include/asm/book3s/64/tlbflush-radix.h +7 −0 Original line number Diff line number Diff line Loading @@ -51,4 +51,11 @@ extern void radix__flush_tlb_all(void); extern void radix__flush_tlb_pte_p9_dd1(unsigned long old_pte, struct mm_struct *mm, unsigned long address); extern void radix__flush_tlb_lpid_page(unsigned int lpid, unsigned long addr, unsigned long page_size); extern void radix__flush_pwc_lpid(unsigned int lpid); extern void radix__local_flush_tlb_lpid(unsigned int lpid); extern void radix__local_flush_tlb_lpid_guest(unsigned int lpid); #endif arch/powerpc/include/asm/reg.h +26 −6 Original line number Diff line number Diff line Loading @@ -146,6 +146,12 @@ #define MSR_64BIT 0 #endif /* Condition Register related */ #define CR0_SHIFT 28 #define CR0_MASK 0xF #define CR0_TBEGIN_FAILURE (0x2 << 28) /* 0b0010 */ /* Power Management - Processor Stop Status and Control Register Fields */ #define PSSCR_RL_MASK 0x0000000F /* Requested Level */ #define PSSCR_MTL_MASK 0x000000F0 /* Maximum Transition Level */ Loading Loading @@ -239,13 +245,27 @@ #define SPRN_TFIAR 0x81 /* Transaction Failure Inst Addr */ #define SPRN_TEXASR 0x82 /* Transaction EXception & Summary */ #define SPRN_TEXASRU 0x83 /* '' '' '' Upper 32 */ #define TEXASR_ABORT __MASK(63-31) /* terminated by tabort or treclaim */ #define TEXASR_SUSP __MASK(63-32) /* tx failed in suspended state */ #define TEXASR_HV __MASK(63-34) /* MSR[HV] when failure occurred */ #define TEXASR_PR __MASK(63-35) /* MSR[PR] when failure occurred */ #define TEXASR_FS __MASK(63-36) /* TEXASR Failure Summary */ #define TEXASR_EXACT __MASK(63-37) /* TFIAR value is exact */ #define TEXASR_FC_LG (63 - 7) /* Failure Code */ #define TEXASR_AB_LG (63 - 31) /* Abort */ #define TEXASR_SU_LG (63 - 32) /* Suspend */ #define TEXASR_HV_LG (63 - 34) /* Hypervisor state*/ #define TEXASR_PR_LG (63 - 35) /* Privilege level */ #define TEXASR_FS_LG (63 - 36) /* failure summary */ #define TEXASR_EX_LG (63 - 37) /* TFIAR exact bit */ #define TEXASR_ROT_LG (63 - 38) /* ROT bit */ #define TEXASR_ABORT __MASK(TEXASR_AB_LG) /* terminated by tabort or treclaim */ #define TEXASR_SUSP __MASK(TEXASR_SU_LG) /* tx failed in suspended state */ #define TEXASR_HV __MASK(TEXASR_HV_LG) /* MSR[HV] when failure occurred */ #define TEXASR_PR __MASK(TEXASR_PR_LG) /* MSR[PR] when failure occurred */ #define TEXASR_FS __MASK(TEXASR_FS_LG) /* TEXASR Failure Summary */ #define TEXASR_EXACT __MASK(TEXASR_EX_LG) /* TFIAR value is exact */ #define TEXASR_ROT __MASK(TEXASR_ROT_LG) #define TEXASR_FC (ASM_CONST(0xFF) << TEXASR_FC_LG) #define SPRN_TFHAR 0x80 /* Transaction Failure Handler Addr */ #define SPRN_TIDR 144 /* Thread ID register */ #define SPRN_CTRLF 0x088 #define SPRN_CTRLT 0x098 Loading arch/powerpc/include/asm/tm.h +0 −2 Original line number Diff line number Diff line Loading @@ -10,12 +10,10 @@ #ifndef __ASSEMBLY__ extern void tm_enable(void); extern void tm_reclaim(struct thread_struct *thread, uint8_t cause); extern void tm_reclaim_current(uint8_t cause); extern void tm_recheckpoint(struct thread_struct *thread); extern void tm_abort(uint8_t cause); extern void tm_save_sprs(struct thread_struct *thread); extern void tm_restore_sprs(struct thread_struct *thread); Loading arch/powerpc/kernel/kvm.c +2 −2 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ #include <linux/kvm_para.h> #include <linux/slab.h> #include <linux/of.h> #include <linux/pagemap.h> #include <asm/reg.h> #include <asm/sections.h> Loading Loading @@ -672,14 +673,13 @@ static void kvm_use_magic_page(void) { u32 *p; u32 *start, *end; u32 tmp; u32 features; /* Tell the host to map the magic page to -4096 on all CPUs */ on_each_cpu(kvm_map_magic_page, &features, 1); /* Quick self-test to see if the mapping works */ if (__get_user(tmp, (u32*)KVM_MAGIC_PAGE)) { if (!fault_in_pages_readable((const char *)KVM_MAGIC_PAGE, sizeof(u32))) { kvm_patching_worked = false; return; } Loading Loading
arch/powerpc/include/asm/asm-prototypes.h +3 −0 Original line number Diff line number Diff line Loading @@ -134,4 +134,7 @@ unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip); void pnv_power9_force_smt4_catch(void); void pnv_power9_force_smt4_release(void); void tm_enable(void); void tm_disable(void); void tm_abort(uint8_t cause); #endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */
arch/powerpc/include/asm/book3s/64/tlbflush-radix.h +7 −0 Original line number Diff line number Diff line Loading @@ -51,4 +51,11 @@ extern void radix__flush_tlb_all(void); extern void radix__flush_tlb_pte_p9_dd1(unsigned long old_pte, struct mm_struct *mm, unsigned long address); extern void radix__flush_tlb_lpid_page(unsigned int lpid, unsigned long addr, unsigned long page_size); extern void radix__flush_pwc_lpid(unsigned int lpid); extern void radix__local_flush_tlb_lpid(unsigned int lpid); extern void radix__local_flush_tlb_lpid_guest(unsigned int lpid); #endif
arch/powerpc/include/asm/reg.h +26 −6 Original line number Diff line number Diff line Loading @@ -146,6 +146,12 @@ #define MSR_64BIT 0 #endif /* Condition Register related */ #define CR0_SHIFT 28 #define CR0_MASK 0xF #define CR0_TBEGIN_FAILURE (0x2 << 28) /* 0b0010 */ /* Power Management - Processor Stop Status and Control Register Fields */ #define PSSCR_RL_MASK 0x0000000F /* Requested Level */ #define PSSCR_MTL_MASK 0x000000F0 /* Maximum Transition Level */ Loading Loading @@ -239,13 +245,27 @@ #define SPRN_TFIAR 0x81 /* Transaction Failure Inst Addr */ #define SPRN_TEXASR 0x82 /* Transaction EXception & Summary */ #define SPRN_TEXASRU 0x83 /* '' '' '' Upper 32 */ #define TEXASR_ABORT __MASK(63-31) /* terminated by tabort or treclaim */ #define TEXASR_SUSP __MASK(63-32) /* tx failed in suspended state */ #define TEXASR_HV __MASK(63-34) /* MSR[HV] when failure occurred */ #define TEXASR_PR __MASK(63-35) /* MSR[PR] when failure occurred */ #define TEXASR_FS __MASK(63-36) /* TEXASR Failure Summary */ #define TEXASR_EXACT __MASK(63-37) /* TFIAR value is exact */ #define TEXASR_FC_LG (63 - 7) /* Failure Code */ #define TEXASR_AB_LG (63 - 31) /* Abort */ #define TEXASR_SU_LG (63 - 32) /* Suspend */ #define TEXASR_HV_LG (63 - 34) /* Hypervisor state*/ #define TEXASR_PR_LG (63 - 35) /* Privilege level */ #define TEXASR_FS_LG (63 - 36) /* failure summary */ #define TEXASR_EX_LG (63 - 37) /* TFIAR exact bit */ #define TEXASR_ROT_LG (63 - 38) /* ROT bit */ #define TEXASR_ABORT __MASK(TEXASR_AB_LG) /* terminated by tabort or treclaim */ #define TEXASR_SUSP __MASK(TEXASR_SU_LG) /* tx failed in suspended state */ #define TEXASR_HV __MASK(TEXASR_HV_LG) /* MSR[HV] when failure occurred */ #define TEXASR_PR __MASK(TEXASR_PR_LG) /* MSR[PR] when failure occurred */ #define TEXASR_FS __MASK(TEXASR_FS_LG) /* TEXASR Failure Summary */ #define TEXASR_EXACT __MASK(TEXASR_EX_LG) /* TFIAR value is exact */ #define TEXASR_ROT __MASK(TEXASR_ROT_LG) #define TEXASR_FC (ASM_CONST(0xFF) << TEXASR_FC_LG) #define SPRN_TFHAR 0x80 /* Transaction Failure Handler Addr */ #define SPRN_TIDR 144 /* Thread ID register */ #define SPRN_CTRLF 0x088 #define SPRN_CTRLT 0x098 Loading
arch/powerpc/include/asm/tm.h +0 −2 Original line number Diff line number Diff line Loading @@ -10,12 +10,10 @@ #ifndef __ASSEMBLY__ extern void tm_enable(void); extern void tm_reclaim(struct thread_struct *thread, uint8_t cause); extern void tm_reclaim_current(uint8_t cause); extern void tm_recheckpoint(struct thread_struct *thread); extern void tm_abort(uint8_t cause); extern void tm_save_sprs(struct thread_struct *thread); extern void tm_restore_sprs(struct thread_struct *thread); Loading
arch/powerpc/kernel/kvm.c +2 −2 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ #include <linux/kvm_para.h> #include <linux/slab.h> #include <linux/of.h> #include <linux/pagemap.h> #include <asm/reg.h> #include <asm/sections.h> Loading Loading @@ -672,14 +673,13 @@ static void kvm_use_magic_page(void) { u32 *p; u32 *start, *end; u32 tmp; u32 features; /* Tell the host to map the magic page to -4096 on all CPUs */ on_each_cpu(kvm_map_magic_page, &features, 1); /* Quick self-test to see if the mapping works */ if (__get_user(tmp, (u32*)KVM_MAGIC_PAGE)) { if (!fault_in_pages_readable((const char *)KVM_MAGIC_PAGE, sizeof(u32))) { kvm_patching_worked = false; return; } Loading