Commit 48126d78 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Krzysztof Kozlowski
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dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator 



Document new OPP table and voltage regulator properties which are needed
for supporting dynamic voltage-frequency scaling of the memory controller.
Some boards may have a fixed core voltage regulator, hence it's optional
because frequency scaling still may be desired.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201104164923.21238-12-digetx@gmail.com


Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 6ec85c03

Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml

+12 −0
Original line number Diff line number Diff line
@@ -39,6 +39,15 @@ properties: 
    description:

      Phandle of the Memory Controller node.



  core-supply:

    description:

      Phandle of voltage regulator of the SoC "core" power domain.



  operating-points-v2:

    description:

      Should contain freqs and voltages and opp-supported-hw property, which

      is a bitfield indicating SoC speedo ID mask.



patternProperties:

  "^emc-timings-[0-9]+$":

    type: object
@@ -218,6 +227,7 @@ required: 
  - clocks

  - nvidia,memory-controller

  - "#interconnect-cells"

  - operating-points-v2



additionalProperties: false
@@ -230,6 +240,8 @@ examples: 
        clocks = <&tegra_car 57>;



        nvidia,memory-controller = <&mc>;

        operating-points-v2 = <&dvfs_opp_table>;

        core-supply = <&vdd_core>;



        #interconnect-cells = <0>;