Commit 47ddb856 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'phy-for-5.12' of... 

Merge tag 'phy-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.12

 - Updates:
   - Conversion to YAML binding for:
        - mtk-xsphy
        - mtk-tphy
        - mtk-ufs
	- HDMI PHY
	- MIPI DSI PHY
	- brcmstb-usb-phy
   - Support for BCM4908 usb phy
   - Support for Qualcomm SDX55 USB and QMP phy
   - Support for Qualcomm SM8350 aka Snapdragon 888 UFS and USB phy
   - Support for Qualcomm SDM660 USB and UFS phy
   - Support for Qualcomm SC8180X USB and UFS phy
   - Support for Qualcomm IPQ6018 USB phy
   - Stm32 phy updates

* tag 'phy-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (41 commits)
  phy: cpcap-usb: Simplify bool conversion
  phy: qcom-qmp: make a const array static, makes object smaller
  phy: zynqmp: Simplify code by using dev_err_probe()
  phy: qcom-qmp: Add support for SM8350 UFS phy
  phy: qcom-qmp: Add UFS V5 registers found in SM8350
  dt-bindings: phy: qcom,qmp: Add SM8350 UFS PHY bindings
  phy: qualcomm: usb28nm: Add MDM9607 init sequence
  dt-bindings: phy: qcom,qusb2: document ipq6018 compatible
  phy: qcom-qusb2: add QUSB2 support for IPQ6018
  phy: qcom-qmp: Add SC8180X USB phy
  phy: qcom-qmp: Add SC8180X UFS phy
  dt-bindings: phy: qcom,qmp: Add SC8180X USB phy
  dt-bindings: phy: qcom,qmp: Add SC8180X UFS to the QMP binding
  dt-bindings: phy: qcom-qusb2: Document SDM660 compatible
  phy: qcom-qusb2: Add configuration for SDM660
  phy: qcom-qusb2: Allow specifying default clock scheme
  dt-bindings: phy: qcom,usb-snps-femto-v2: Add SM8250 and SM8350 bindings
  phy: qcom-qmp: Add SM8350 USB QMP PHYs
  dt-bindings: phy: qcom,qmp: Add SM8150, SM8250 and SM8350 USB PHY bindings
  phy: qcom-qmp: Add support for SDX55 QMP PHY
  ...
parents f3be8613 d68f2cb0

Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt

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MIPI TX Configuration Module

============================



The MIPI TX configuration module controls the MIPI D-PHY.



Required properties:

- compatible: "mediatek,<chip>-mipi-tx"

- the supported chips are mt2701, 7623, mt8173 and mt8183.

- reg: Physical base address and length of the controller's registers

- clocks: PLL reference clock

- clock-output-names: name of the output clock line to the DSI encoder

- #clock-cells: must be <0>;

- #phy-cells: must be <0>.



Optional properties:

- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And

						   the step is 200.

- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If

               unspecified default values shall be used.

- nvmem-cell-names: Should be "calibration-data"

See phy/mediatek,dsi-phy.yaml



Example:

Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt

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@@ -53,23 +53,7 @@ Required properties: 


HDMI PHY

========



The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel

output and drives the HDMI pads.



Required properties:

- compatible: "mediatek,<chip>-hdmi-phy"

- the supported chips are mt2701, mt7623 and mt8173

- reg: Physical base address and length of the module's registers

- clocks: PLL reference clock

- clock-names: must contain "pll_ref"

- clock-output-names: must be "hdmitx_dig_cts" on mt8173

- #phy-cells: must be <0>

- #clock-cells: must be <0>



Optional properties:

- mediatek,ibias: TX DRV bias current for <1.65Gbps, defaults to 0xa

- mediatek,ibias_up: TX DRV bias current for >1.65Gbps, defaults to 0x1c

See phy/mediatek,hdmi-phy.yaml



Example:

Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt

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Broadcom STB USB PHY



Required properties:

- compatible: should be one of

	"brcm,brcmstb-usb-phy"

	"brcm,bcm7216-usb-phy"

	"brcm,bcm7211-usb-phy"



- reg and reg-names properties requirements are specific to the

  compatible string.

  "brcm,brcmstb-usb-phy":

    - reg: 1 or 2 offset and length pairs. One for the base CTRL registers

           and an optional pair for systems with USB 3.x support

    - reg-names: not specified

  "brcm,bcm7216-usb-phy":

    - reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL

           registers

    - reg-names: "ctrl", "xhci_ec", "xhci_gbl"

  "brcm,bcm7211-usb-phy":

    - reg: 5 offset and length pairs for CTRL, XHCI_EC, XHCI_GBL,

           USB_PHY and USB_MDIO registers and an optional pair

	   for the BDC registers

    - reg-names: "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"



- #phy-cells: Shall be 1 as it expects one argument for setting

	      the type of the PHY. Possible values are:

	      - PHY_TYPE_USB2 for USB1.1/2.0 PHY

	      - PHY_TYPE_USB3 for USB3.x PHY



Optional Properties:

- clocks : clock phandles.

- clock-names: String, clock name.

- interrupts: wakeup interrupt

- interrupt-names: "wakeup"

- brcm,ipp: Boolean, Invert Port Power.

  Possible values are: 0 (Don't invert), 1 (Invert)

- brcm,ioc: Boolean, Invert Over Current detection.

  Possible values are: 0 (Don't invert), 1 (Invert)

- dr_mode: String, PHY Device mode.

  Possible values are: "host", "peripheral ", "drd" or "typec-pd"

  If this property is not defined, the phy will default to "host" mode.

- brcm,syscon-piarbctl: phandle to syscon for handling config registers

NOTE: one or both of the following two properties must be set

- brcm,has-xhci: Boolean indicating the phy has an XHCI phy.

- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy.





Example:



usbphy_0: usb-phy@f0470200 {

	reg = <0xf0470200 0xb8>,

		<0xf0471940 0x6c0>;

	compatible = "brcm,brcmstb-usb-phy";

	#phy-cells = <1>;

	dr_mode = "host"

	brcm,ioc = <1>;

	brcm,ipp = <1>;

	brcm,has-xhci;

	brcm,has-eohci;

	clocks = <&usb20>, <&usb30>;

	clock-names = "sw_usb", "sw_usb3";

};



usb-phy@29f0200 {

	reg = <0x29f0200 0x200>,

		<0x29c0880 0x30>,

		<0x29cc100 0x534>,

		<0x2808000 0x24>,

		<0x2980080 0x8>;

	reg-names = "ctrl",

		"xhci_ec",

		"xhci_gbl",

		"usb_phy",

		"usb_mdio";

	brcm,ioc = <0x0>;

	brcm,ipp = <0x0>;

	compatible = "brcm,bcm7211-usb-phy";

	interrupts = <0x30>;

	interrupt-parent = <&vpu_intr1_nosec_intc>;

	interrupt-names = "wake";

	#phy-cells = <0x1>;

	brcm,has-xhci;

	syscon-piarbctl = <&syscon_piarbctl>;

	clocks = <&scmi_clk 256>;

	clock-names = "sw_usb";

};

Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/brcm,brcmstb-usb-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Broadcom STB USB PHY



description: Broadcom's PHY that handles EHCI/OHCI and/or XHCI



maintainers:

  - Al Cooper <alcooperx@gmail.com>

  - Rafał Miłecki <rafal@milecki.pl>



properties:

  compatible:

    enum:

      - brcm,bcm4908-usb-phy

      - brcm,bcm7211-usb-phy

      - brcm,bcm7216-usb-phy

      - brcm,brcmstb-usb-phy



  reg:

    minItems: 1

    maxItems: 6

    items:

      - description: the base CTRL register

      - description: XHCI EC register

      - description: XHCI GBL register

      - description: USB PHY register

      - description: USB MDIO register

      - description: BDC register



  reg-names:

    minItems: 1

    maxItems: 6

    items:

      - const: ctrl

      - const: xhci_ec

      - const: xhci_gbl

      - const: usb_phy

      - const: usb_mdio

      - const: bdc_ec



  clocks:

    minItems: 1

    maxItems: 2



  clock-names:

    minItems: 1

    maxItems: 2

    items:

      - const: sw_usb

      - const: sw_usb3



  interrupts:

    description: wakeup interrupt



  interrupt-names:

    const: wake



  brcm,ipp:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: Invert Port Power

    minimum: 0

    maximum: 1



  brcm,ioc:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: Invert Over Current detection

    minimum: 0

    maximum: 1



  dr_mode:

    description: PHY Device mode. If this property is not defined, the PHY will

      default to "host" mode.

    enum:

      - host

      - peripheral

      - drd

      - typec-pd



  brcm,syscon-piarbctl:

    description: phandle to syscon for handling config registers

    $ref: /schemas/types.yaml#/definitions/phandle



  brcm,has-xhci:

    description: Indicates the PHY has an XHCI PHY.

    type: boolean



  brcm,has-eohci:

    description: Indicates the PHY has an EHCI/OHCI PHY.

    type: boolean



  "#phy-cells":

    description: |

      Cell allows setting the type of the PHY. Possible values are:

      - PHY_TYPE_USB2 for USB1.1/2.0 PHY

      - PHY_TYPE_USB3 for USB3.x PHY

    const: 1



required:

  - reg

  - "#phy-cells"



anyOf:

  - required:

      - brcm,has-xhci

  - required:

      - brcm,has-eohci



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - const: brcm,bcm4908-usb-phy

              - const: brcm,brcmstb-usb-phy

    then:

      properties:

        reg:

          minItems: 1

          maxItems: 2

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm7211-usb-phy

    then:

      properties:

        reg:

          minItems: 5

          maxItems: 6

        reg-names:

          minItems: 5

          maxItems: 6

  - if:

      properties:

        compatible:

          contains:

            const: brcm,bcm7216-usb-phy

    then:

      properties:

        reg:

          minItems: 3

          maxItems: 3

        reg-names:

          minItems: 3

          maxItems: 3



additionalProperties: false



examples:

  - |

    #include <dt-bindings/phy/phy.h>



    usb-phy@f0470200 {

        compatible = "brcm,brcmstb-usb-phy";

        reg = <0xf0470200 0xb8>,

              <0xf0471940 0x6c0>;

        #phy-cells = <1>;

        dr_mode = "host";

        brcm,ioc = <1>;

        brcm,ipp = <1>;

        brcm,has-xhci;

        brcm,has-eohci;

        clocks = <&usb20>, <&usb30>;

        clock-names = "sw_usb", "sw_usb3";

    };

  - |

    #include <dt-bindings/phy/phy.h>



    usb-phy@29f0200 {

        compatible = "brcm,bcm7211-usb-phy";

        reg = <0x29f0200 0x200>,

              <0x29c0880 0x30>,

              <0x29cc100 0x534>,

              <0x2808000 0x24>,

              <0x2980080 0x8>;

        reg-names = "ctrl",

            "xhci_ec",

            "xhci_gbl",

            "usb_phy",

            "usb_mdio";

        brcm,ioc = <0x0>;

        brcm,ipp = <0x0>;

        interrupts = <0x30>;

        interrupt-parent = <&vpu_intr1_nosec_intc>;

        interrupt-names = "wake";

        #phy-cells = <0x1>;

        brcm,has-xhci;

        brcm,syscon-piarbctl = <&syscon_piarbctl>;

        clocks = <&scmi_clk 256>;

        clock-names = "sw_usb";

    };

Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (c) 2020 MediaTek

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MediaTek MIPI Display Serial Interface (DSI) PHY binding



maintainers:

  - Chun-Kuang Hu <chunkuang.hu@kernel.org>

  - Philipp Zabel <p.zabel@pengutronix.de>

  - Chunfeng Yun <chunfeng.yun@mediatek.com>



description: The MIPI DSI PHY supports up to 4-lane output.



properties:

  $nodename:

    pattern: "^dsi-phy@[0-9a-f]+$"



  compatible:

    enum:

      - mediatek,mt2701-mipi-tx

      - mediatek,mt7623-mipi-tx

      - mediatek,mt8173-mipi-tx

      - mediatek,mt8183-mipi-tx



  reg:

    maxItems: 1



  clocks:

    items:

      - description: PLL reference clock



  clock-output-names:

    maxItems: 1



  "#phy-cells":

    const: 0



  "#clock-cells":

    const: 0



  nvmem-cells:

    maxItems: 1

    description: A phandle to the calibration data provided by a nvmem device,

      if unspecified, default values shall be used.



  nvmem-cell-names:

    items:

      - const: calibration-data



  drive-strength-microamp:

    description: adjust driving current

    multipleOf: 200

    minimum: 2000

    maximum: 6000

    default: 4600



required:

  - compatible

  - reg

  - clocks

  - clock-output-names

  - "#phy-cells"

  - "#clock-cells"



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/mt8173-clk.h>

    dsi-phy@10215000 {

        compatible = "mediatek,mt8173-mipi-tx";

        reg = <0x10215000 0x1000>;

        clocks = <&clk26m>;

        clock-output-names = "mipi_tx0_pll";

        drive-strength-microamp = <4000>;

        nvmem-cells= <&mipi_tx_calibration>;

        nvmem-cell-names = "calibration-data";

        #clock-cells = <0>;

        #phy-cells = <0>;

    };



...