Commit 47d55c62 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge tag 'linux-can-fixes-for-6.4-20230515' of... 

Merge tag 'linux-can-fixes-for-6.4-20230515' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can

Marc Kleine-Budde says:

====================
pull-request: can 2023-05-15

The first 2 patches are by Oliver Hartkopp and allow the
MSG_CMSG_COMPAT flag for isotp and j1939.

The next patch is by Oliver Hartkopp, too and adds missing CAN XL
support in can_put_echo_skb().

Geert Uytterhoeven's patch let's the bxcan driver depend on
ARCH_STM32.

The last 5 patches are from Dario Binacchi and also affect the bxcan
driver. The bxcan driver hit mainline with v6.4-rc1 and was originally
written for IP cores containing 2 CAN interfaces with shared
resources. Dario's series updates the DT bindings and driver to
support IP cores with a single CAN interface instance as well as
adding the bxcan to the stm32f746's device tree.

* tag 'linux-can-fixes-for-6.4-20230515' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can:
  ARM: dts: stm32: add CAN support on stm32f746
  can: bxcan: add support for single peripheral configuration
  ARM: dts: stm32: add pin map for CAN controller on stm32f7
  ARM: dts: stm32f429: put can2 in secondary mode
  dt-bindings: net: can: add "st,can-secondary" property
  can: CAN_BXCAN should depend on ARCH_STM32
  can: dev: fix missing CAN XL support in can_put_echo_skb()
  can: j1939: recvmsg(): allow MSG_CMSG_COMPAT flag
  can: isotp: recvmsg(): allow MSG_CMSG_COMPAT flag
====================

Link: https://lore.kernel.org/r/20230515204722.1000957-1-mkl@pengutronix.de


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents d6352dae c08e2401

Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml

+15 −4
Original line number Diff line number Diff line
@@ -21,11 +21,22 @@ properties: 


  st,can-primary:

    description:

      Primary and secondary mode of the bxCAN peripheral is only relevant

      if the chip has two CAN peripherals. In that case they share some

      of the required logic.

      Primary mode of the bxCAN peripheral is only relevant if the chip has

      two CAN peripherals in dual CAN configuration. In that case they share

      some of the required logic.

      Not to be used if the peripheral is in single CAN configuration.

      To avoid misunderstandings, it should be noted that ST documentation

      uses the terms master/slave instead of primary/secondary.

      uses the terms master instead of primary.

    type: boolean



  st,can-secondary:

    description:

      Secondary mode of the bxCAN peripheral is only relevant if the chip

      has two CAN peripherals in dual CAN configuration. In that case they

      share some of the required logic.

      Not to be used if the peripheral is in single CAN configuration.

      To avoid misunderstandings, it should be noted that ST documentation

      uses the terms slave instead of secondary.

    type: boolean



  reg:

arch/arm/boot/dts/stm32f429.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -387,6 +387,7 @@ 
			interrupt-names = "tx", "rx0", "rx1", "sce";

			resets = <&rcc STM32F4_APB1_RESET(CAN2)>;

			clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;

			st,can-secondary;

			st,gcan = <&gcan>;

			status = "disabled";

		};

arch/arm/boot/dts/stm32f7-pinctrl.dtsi

+82 −0
Original line number Diff line number Diff line
@@ -283,6 +283,88 @@ 
					slew-rate = <2>;

				};

			};



			can1_pins_a: can1-0 {

				pins1 {

					pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */

				};

				pins2 {

					pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */

					bias-pull-up;

				};

			};



			can1_pins_b: can1-1 {

				pins1 {

					pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */

				};

				pins2 {

					pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */

					bias-pull-up;

				};

			};



			can1_pins_c: can1-2 {

				pins1 {

					pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */

				};

				pins2 {

					pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */

					bias-pull-up;



				};

			};



			can1_pins_d: can1-3 {

				pins1 {

					pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */

				};

				pins2 {

					pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */

					bias-pull-up;



				};

			};



			can2_pins_a: can2-0 {

				pins1 {

					pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */

				};

				pins2 {

					pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */

					bias-pull-up;

				};

			};



			can2_pins_b: can2-1 {

				pins1 {

					pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */

				};

				pins2 {

					pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */

					bias-pull-up;

				};

			};



			can3_pins_a: can3-0 {

				pins1 {

					pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */

				};

				pins2 {

					pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */

					bias-pull-up;

				};

			};



			can3_pins_b: can3-1 {

				pins1 {

					pinmux = <STM32_PINMUX('B', 4, AF11)>;  /* CAN3_TX */

				};

				pins2 {

					pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */

					bias-pull-up;

				};

			};

		};

	};

};

arch/arm/boot/dts/stm32f746.dtsi

+47 −0
Original line number Diff line number Diff line
@@ -257,6 +257,23 @@ 
			status = "disabled";

		};



		can3: can@40003400 {

			compatible = "st,stm32f4-bxcan";

			reg = <0x40003400 0x200>;

			interrupts = <104>, <105>, <106>, <107>;

			interrupt-names = "tx", "rx0", "rx1", "sce";

			resets = <&rcc STM32F7_APB1_RESET(CAN3)>;

			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;

			st,gcan = <&gcan3>;

			status = "disabled";

		};



		gcan3: gcan@40003600 {

			compatible = "st,stm32f4-gcan", "syscon";

			reg = <0x40003600 0x200>;

			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;

		};



		usart2: serial@40004400 {

			compatible = "st,stm32f7-uart";

			reg = <0x40004400 0x400>;
@@ -337,6 +354,36 @@ 
			status = "disabled";

		};



		can1: can@40006400 {

			compatible = "st,stm32f4-bxcan";

			reg = <0x40006400 0x200>;

			interrupts = <19>, <20>, <21>, <22>;

			interrupt-names = "tx", "rx0", "rx1", "sce";

			resets = <&rcc STM32F7_APB1_RESET(CAN1)>;

			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;

			st,can-primary;

			st,gcan = <&gcan1>;

			status = "disabled";

		};



		gcan1: gcan@40006600 {

			compatible = "st,stm32f4-gcan", "syscon";

			reg = <0x40006600 0x200>;

			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;

		};



		can2: can@40006800 {

			compatible = "st,stm32f4-bxcan";

			reg = <0x40006800 0x200>;

			interrupts = <63>, <64>, <65>, <66>;

			interrupt-names = "tx", "rx0", "rx1", "sce";

			resets = <&rcc STM32F7_APB1_RESET(CAN2)>;

			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>;

			st,can-secondary;

			st,gcan = <&gcan1>;

			status = "disabled";

		};



		cec: cec@40006c00 {

			compatible = "st,stm32-cec";

			reg = <0x40006C00 0x400>;

drivers/net/can/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -95,7 +95,7 @@ config CAN_AT91 


config CAN_BXCAN

	tristate "STM32 Basic Extended CAN (bxCAN) devices"

	depends on OF || ARCH_STM32 || COMPILE_TEST

	depends on ARCH_STM32 || COMPILE_TEST

	depends on HAS_IOMEM

	select CAN_RX_OFFLOAD

	help