Commit 47a3aeb3 authored by Kan Liang's avatar Kan Liang Committed by Peter Zijlstra
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perf/x86/intel/pebs: Fix PEBS timestamps overwritten 



The PEBS TSC-based timestamps do not appear correctly in the final
perf.data output file from perf record.

The data->time field setup by PEBS in the setup_pebs_fixed_sample_data()
is later overwritten by perf_events generic code in
perf_prepare_sample(). There is an ordering problem.

Set the sample flags when the data->time is updated by PEBS.
The data->time field will not be overwritten anymore.

Reported-by: default avatarAndreas Kogler <andreas.kogler.0x@gmail.com>
Reported-by: default avatarStephane Eranian <eranian@google.com>
Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220901130959.1285717-3-kan.liang@linux.intel.com
parent 3aac580d

arch/x86/events/intel/ds.c

+6 −2
Original line number Diff line number Diff line
@@ -1635,8 +1635,10 @@ static void setup_pebs_fixed_sample_data(struct perf_event *event, 
	 * We can only do this for the default trace clock.

	 */

	if (x86_pmu.intel_cap.pebs_format >= 3 &&

		event->attr.use_clockid == 0)

		event->attr.use_clockid == 0) {

		data->time = native_sched_clock_from_tsc(pebs->tsc);

		data->sample_flags |= PERF_SAMPLE_TIME;

	}



	if (has_branch_stack(event))

		data->br_stack = &cpuc->lbr_stack;
@@ -1697,8 +1699,10 @@ static void setup_pebs_adaptive_sample_data(struct perf_event *event, 
	perf_sample_data_init(data, 0, event->hw.last_period);

	data->period = event->hw.last_period;



	if (event->attr.use_clockid == 0)

	if (event->attr.use_clockid == 0) {

		data->time = native_sched_clock_from_tsc(basic->tsc);

		data->sample_flags |= PERF_SAMPLE_TIME;

	}



	/*

	 * We must however always use iregs for the unwinder to stay sane; the