Commit 4785cff7 authored by Stephen Boyd's avatar Stephen Boyd Committed by Bjorn Andersson
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arm64: dts: sdm845: Add iommus property to qup



The SMMU that sits in front of the QUP needs to be programmed properly
so that the i2c geni driver can allocate DMA descriptors. Failure to do
this leads to faults when using devices such as an i2c touchscreen where
the transaction is larger than 32 bytes and we use a DMA buffer.

arm-smmu 15000000.iommu: Unexpected global fault, this could be serious
arm-smmu 15000000.iommu:         GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000006c0, GFSYNR2 0x00000000

Add the right SID and mask so this works.

Reviewed-by: default avatarVinod Koul <vkoul@kernel.org>
Tested-by: default avatarCaleb Connolly <caleb@connolly.tech>
Tested-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
[bjorn: Define for second QUP as well, be more specific in sdm845.dtsi]
Link: https://lore.kernel.org/r/20201122034149.626045-1-bjorn.andersson@linaro.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 6acb71fd
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+2 −0
Original line number Diff line number Diff line
@@ -653,10 +653,12 @@ ap_ts_i2c: &i2c14 {

&qupv3_id_0 {
	status = "okay";
	iommus = <&apps_smmu 0x0 0x3>;
};

&qupv3_id_1 {
	status = "okay";
	iommus = <&apps_smmu 0x6c0 0x3>;
};

&sdhc_2 {
+2 −0
Original line number Diff line number Diff line
@@ -1120,6 +1120,7 @@
			clock-names = "m-ahb", "s-ahb";
			clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
				 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
			iommus = <&apps_smmu 0x3 0x0>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;
@@ -1460,6 +1461,7 @@
			clock-names = "m-ahb", "s-ahb";
			clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
				 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
			iommus = <&apps_smmu 0x6c3 0x0>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;