Commit 47334146 authored by Jing Zhang's avatar Jing Zhang Committed by Oliver Upton
Browse files

KVM: arm64: Save ID registers' sanitized value per guest



Initialize the default ID register values upon the first call to
KVM_ARM_VCPU_INIT. The vCPU feature flags are finalized at that point,
so it is possible to determine the maximum feature set supported by a
particular VM configuration. Do nothing with these values for now, as we
need to rework the plumbing of what's already writable to be compatible
with the generic infrastructure.

Co-developed-by: default avatarReiji Watanabe <reijiw@google.com>
Signed-off-by: default avatarReiji Watanabe <reijiw@google.com>
Signed-off-by: default avatarJing Zhang <jingzhangos@google.com>
Link: https://lore.kernel.org/r/20230609190054.1542113-7-oliver.upton@linux.dev


[Oliver: Hoist everything into KVM_ARM_VCPU_INIT time, so the features
 are final]
Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
parent d86cde6e
Loading
Loading
Loading
Loading
+15 −0
Original line number Diff line number Diff line
@@ -225,6 +225,8 @@ struct kvm_arch {
#define KVM_ARCH_FLAG_TIMER_PPIS_IMMUTABLE		6
	/* SMCCC filter initialized for the VM */
#define KVM_ARCH_FLAG_SMCCC_FILTER_CONFIGURED		7
	/* Initial ID reg values loaded */
#define KVM_ARCH_FLAG_ID_REGS_INITIALIZED		8
	unsigned long flags;

	/* VM-wide vCPU feature set */
@@ -247,6 +249,19 @@ struct kvm_arch {
	struct kvm_smccc_features smccc_feat;
	struct maple_tree smccc_filter;

	/*
	 * Emulated CPU ID registers per VM
	 * (Op0, Op1, CRn, CRm, Op2) of the ID registers to be saved in it
	 * is (3, 0, 0, crm, op2), where 1<=crm<8, 0<=op2<8.
	 *
	 * These emulated idregs are VM-wide, but accessed from the context of a vCPU.
	 * Atomic access to multiple idregs are guarded by kvm_arch.config_lock.
	 */
#define IDREG_IDX(id)		(((sys_reg_CRm(id) - 1) << 3) | sys_reg_Op2(id))
#define IDREG(kvm, id)		((kvm)->arch.id_regs[IDREG_IDX(id)])
#define KVM_ARM_ID_REG_NUM	(IDREG_IDX(sys_reg(3, 0, 0, 7, 7)) + 1)
	u64 id_regs[KVM_ARM_ID_REG_NUM];

	/*
	 * For an untrusted host VM, 'pkvm.handle' is used to lookup
	 * the associated pKVM instance in the hypervisor.
+53 −3
Original line number Diff line number Diff line
@@ -1311,6 +1311,17 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *r
	return __kvm_read_sanitised_id_reg(vcpu, r);
}

/*
 * Return true if the register's (Op0, Op1, CRn, CRm, Op2) is
 * (3, 0, 0, crm, op2), where 1<=crm<8, 0<=op2<8.
 */
static inline bool is_id_reg(u32 id)
{
	return (sys_reg_Op0(id) == 3 && sys_reg_Op1(id) == 0 &&
		sys_reg_CRn(id) == 0 && sys_reg_CRm(id) >= 1 &&
		sys_reg_CRm(id) < 8);
}

static unsigned int id_visibility(const struct kvm_vcpu *vcpu,
				  const struct sys_reg_desc *r)
{
@@ -2303,6 +2314,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
	EL2_REG(SP_EL2, NULL, reset_unknown, 0),
};

static const struct sys_reg_desc *first_idreg;

static bool trap_dbgdidr(struct kvm_vcpu *vcpu,
			struct sys_reg_params *p,
			const struct sys_reg_desc *r)
@@ -2993,6 +3006,28 @@ static bool emulate_sys_reg(struct kvm_vcpu *vcpu,
	return false;
}

static void kvm_reset_id_regs(struct kvm_vcpu *vcpu)
{
	const struct sys_reg_desc *idreg = first_idreg;
	u32 id = reg_to_encoding(idreg);
	struct kvm *kvm = vcpu->kvm;

	if (test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags))
		return;

	lockdep_assert_held(&kvm->arch.config_lock);

	/* Initialize all idregs */
	while (is_id_reg(id)) {
		IDREG(kvm, id) = idreg->reset(vcpu, idreg);

		idreg++;
		id = reg_to_encoding(idreg);
	}

	set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags);
}

/**
 * kvm_reset_sys_regs - sets system registers to reset value
 * @vcpu: The VCPU pointer
@@ -3004,9 +3039,17 @@ void kvm_reset_sys_regs(struct kvm_vcpu *vcpu)
{
	unsigned long i;

	for (i = 0; i < ARRAY_SIZE(sys_reg_descs); i++)
		if (sys_reg_descs[i].reset)
			sys_reg_descs[i].reset(vcpu, &sys_reg_descs[i]);
	kvm_reset_id_regs(vcpu);

	for (i = 0; i < ARRAY_SIZE(sys_reg_descs); i++) {
		const struct sys_reg_desc *r = &sys_reg_descs[i];

		if (is_id_reg(reg_to_encoding(r)))
			continue;

		if (r->reset)
			r->reset(vcpu, r);
	}
}

/**
@@ -3413,6 +3456,7 @@ int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)

int __init kvm_sys_reg_table_init(void)
{
	struct sys_reg_params params;
	bool valid = true;
	unsigned int i;

@@ -3431,5 +3475,11 @@ int __init kvm_sys_reg_table_init(void)
	for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++)
		invariant_sys_regs[i].reset(NULL, &invariant_sys_regs[i]);

	/* Find the first idreg (SYS_ID_PFR0_EL1) in sys_reg_descs. */
	params = encoding_to_params(SYS_ID_PFR0_EL1);
	first_idreg = find_reg(&params, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
	if (!first_idreg)
		return -EINVAL;

	return 0;
}
+7 −0
Original line number Diff line number Diff line
@@ -27,6 +27,13 @@ struct sys_reg_params {
	bool	is_write;
};

#define encoding_to_params(reg)						\
	((struct sys_reg_params){ .Op0 = sys_reg_Op0(reg),		\
				  .Op1 = sys_reg_Op1(reg),		\
				  .CRn = sys_reg_CRn(reg),		\
				  .CRm = sys_reg_CRm(reg),		\
				  .Op2 = sys_reg_Op2(reg) })

#define esr_sys64_to_params(esr)                                               \
	((struct sys_reg_params){ .Op0 = ((esr) >> 20) & 3,                    \
				  .Op1 = ((esr) >> 14) & 0x7,                  \