Unverified Commit 46b0d050 authored by Charles Keepax's avatar Charles Keepax Committed by Mark Brown
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ASoC: cs35l41: Add ASP TX3/4 source to register patch 



The mixer controls for ASP TX3/4 are set to values that are not included
in their enumeration control. This will cause spurious event
notifications when the controls are first changed, as the register value
changes whilst the actual visible enumeration value does not. Use the
register patch to set them to a known value, zero, which equates to zero
fill, thereby avoiding the spurious notifications.

Signed-off-by: default avatarCharles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20220623105120.1981154-2-ckeepax@opensource.cirrus.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 11d7a12f

sound/soc/codecs/cs35l41-lib.c

+8 −2
Original line number Original line Diff line number Diff line
@@ -37,8 +37,8 @@ static const struct reg_default cs35l41_reg[] = { 
	{ CS35L41_DAC_PCM1_SRC,			0x00000008 },

	{ CS35L41_DAC_PCM1_SRC,			0x00000008 },

	{ CS35L41_ASP_TX1_SRC,			0x00000018 },

	{ CS35L41_ASP_TX1_SRC,			0x00000018 },

	{ CS35L41_ASP_TX2_SRC,			0x00000019 },

	{ CS35L41_ASP_TX2_SRC,			0x00000019 },

	{ CS35L41_ASP_TX3_SRC,			0x00000020 },

	{ CS35L41_ASP_TX3_SRC,			0x00000000 },

	{ CS35L41_ASP_TX4_SRC,			0x00000021 },

	{ CS35L41_ASP_TX4_SRC,			0x00000000 },

	{ CS35L41_DSP1_RX1_SRC,			0x00000008 },

	{ CS35L41_DSP1_RX1_SRC,			0x00000008 },

	{ CS35L41_DSP1_RX2_SRC,			0x00000009 },

	{ CS35L41_DSP1_RX2_SRC,			0x00000009 },

	{ CS35L41_DSP1_RX3_SRC,			0x00000018 },

	{ CS35L41_DSP1_RX3_SRC,			0x00000018 },
@@ -644,6 +644,8 @@ static const struct reg_sequence cs35l41_reva0_errata_patch[] = { 
	{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },

	{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },

	{ CS35L41_PWR_CTRL2,		 0x00000000 },

	{ CS35L41_PWR_CTRL2,		 0x00000000 },

	{ CS35L41_AMP_GAIN_CTRL,	 0x00000000 },

	{ CS35L41_AMP_GAIN_CTRL,	 0x00000000 },

	{ CS35L41_ASP_TX3_SRC,		 0x00000000 },

	{ CS35L41_ASP_TX4_SRC,		 0x00000000 },

};

};





static const struct reg_sequence cs35l41_revb0_errata_patch[] = {

static const struct reg_sequence cs35l41_revb0_errata_patch[] = {
@@ -655,6 +657,8 @@ static const struct reg_sequence cs35l41_revb0_errata_patch[] = { 
	{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },

	{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },

	{ CS35L41_PWR_CTRL2,		 0x00000000 },

	{ CS35L41_PWR_CTRL2,		 0x00000000 },

	{ CS35L41_AMP_GAIN_CTRL,	 0x00000000 },

	{ CS35L41_AMP_GAIN_CTRL,	 0x00000000 },

	{ CS35L41_ASP_TX3_SRC,		 0x00000000 },

	{ CS35L41_ASP_TX4_SRC,		 0x00000000 },

};

};





static const struct reg_sequence cs35l41_revb2_errata_patch[] = {

static const struct reg_sequence cs35l41_revb2_errata_patch[] = {
@@ -666,6 +670,8 @@ static const struct reg_sequence cs35l41_revb2_errata_patch[] = { 
	{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },

	{ CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000 },

	{ CS35L41_PWR_CTRL2,		 0x00000000 },

	{ CS35L41_PWR_CTRL2,		 0x00000000 },

	{ CS35L41_AMP_GAIN_CTRL,	 0x00000000 },

	{ CS35L41_AMP_GAIN_CTRL,	 0x00000000 },

	{ CS35L41_ASP_TX3_SRC,		 0x00000000 },

	{ CS35L41_ASP_TX4_SRC,		 0x00000000 },

};

};





static const struct reg_sequence cs35l41_fs_errata_patch[] = {

static const struct reg_sequence cs35l41_fs_errata_patch[] = {