Commit 46967bc1 authored by Terry Bowman's avatar Terry Bowman Committed by Wolfram Sang
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i2c: piix4: Add EFCH MMIO support to SMBus base address detect 



The EFCH SMBus controller's base address is determined using details in
FCH::PM::DECODEEN[smbusasfiobase] and FCH::PM::DECODEEN[smbusasfioen].These
register fields were accessed using cd6h/cd7h port I/O. cd6h/cd7h port I/O
is no longer available in later AMD processors. Change base address
detection to use MMIO instead of port I/O cd6h/cd7h.

Signed-off-by: default avatarTerry Bowman <terry.bowman@amd.com>
Reviewed-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: default avatarJean Delvare <jdelvare@suse.de>
Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
parent 7c148722

drivers/i2c/busses/i2c-piix4.c

+9 −4
Original line number Diff line number Diff line
@@ -344,10 +344,15 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, 
	if (retval)

		return retval;



	if (mmio_cfg.use_mmio) {

		smba_en_lo = ioread8(mmio_cfg.addr);

		smba_en_hi = ioread8(mmio_cfg.addr + 1);

	} else {

		outb_p(smb_en, SB800_PIIX4_SMB_IDX);

		smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);

		outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);

		smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);

	}



	piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg);