Commit 454e8d29 authored by Sam Protsenko's avatar Sam Protsenko Committed by Krzysztof Kozlowski
Browse files

clk: samsung: Extract parent clock enabling to common function 



Extract parent clock enabling from exynos_arm64_register_cmu() to
dedicated function.

Tested-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20230307002423.24454-3-semen.protsenko@linaro.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent bed76f69

drivers/clk/samsung/clk-exynos-arm64.c

+41 −16
Original line number Diff line number Diff line
@@ -57,38 +57,63 @@ static void __init exynos_arm64_init_clocks(struct device_node *np, 
}



/**

 * exynos_arm64_register_cmu - Register specified Exynos CMU domain

 * exynos_arm64_enable_bus_clk - Enable parent clock of specified CMU

 *

 * @dev:	Device object; may be NULL if this function is not being

 *		called from platform driver probe function

 * @np:		CMU device tree node

 * @cmu:	CMU data

 *

 * Register specified CMU domain, which includes next steps:

 * Keep CMU parent clock running (needed for CMU registers access).

 *

 * 1. Enable parent clock of @cmu CMU

 * 2. Set initial registers configuration for @cmu CMU clocks

 * 3. Register @cmu CMU clocks using Samsung clock framework API

 * Return: 0 on success or a negative error code on failure.

 */

void __init exynos_arm64_register_cmu(struct device *dev,

static int __init exynos_arm64_enable_bus_clk(struct device *dev,

		struct device_node *np, const struct samsung_cmu_info *cmu)

{

	/* Keep CMU parent clock running (needed for CMU registers access) */

	if (cmu->clk_name) {

	struct clk *parent_clk;



	if (!cmu->clk_name)

		return 0;



	if (dev)

		parent_clk = clk_get(dev, cmu->clk_name);

	else

		parent_clk = of_clk_get_by_name(np, cmu->clk_name);



		if (IS_ERR(parent_clk)) {

			pr_err("%s: could not find bus clock %s; err = %ld\n",

			       __func__, cmu->clk_name, PTR_ERR(parent_clk));

		} else {

			clk_prepare_enable(parent_clk);

		}

	if (IS_ERR(parent_clk))

		return PTR_ERR(parent_clk);



	return clk_prepare_enable(parent_clk);

}



/**

 * exynos_arm64_register_cmu - Register specified Exynos CMU domain

 * @dev:	Device object; may be NULL if this function is not being

 *		called from platform driver probe function

 * @np:		CMU device tree node

 * @cmu:	CMU data

 *

 * Register specified CMU domain, which includes next steps:

 *

 * 1. Enable parent clock of @cmu CMU

 * 2. Set initial registers configuration for @cmu CMU clocks

 * 3. Register @cmu CMU clocks using Samsung clock framework API

 */

void __init exynos_arm64_register_cmu(struct device *dev,

		struct device_node *np, const struct samsung_cmu_info *cmu)

{

	int err;



	/*

	 * Try to boot even if the parent clock enablement fails, as it might be

	 * already enabled by bootloader.

	 */

	err = exynos_arm64_enable_bus_clk(dev, np, cmu);

	if (err)

		pr_err("%s: could not enable bus clock %s; err = %d\n",

		       __func__, cmu->clk_name, err);



	exynos_arm64_init_clocks(np, cmu->clk_regs, cmu->nr_clk_regs);

	samsung_cmu_register_one(np, cmu);

}