Commit 4537f6f1 authored by Zhen Lei's avatar Zhen Lei Committed by Will Deacon
Browse files

iommu/arm-smmu-v3: Add and use static helper function arm_smmu_cmdq_issue_cmd_with_sync() 



The obvious key to the performance optimization of commit 587e6c10
("iommu/arm-smmu-v3: Reduce contention during command-queue insertion") is
to allow multiple cores to insert commands in parallel after a brief mutex
contention.

Obviously, inserting as many commands at a time as possible can reduce the
number of times the mutex contention participates, thereby improving the
overall performance. At least it reduces the number of calls to function
arm_smmu_cmdq_issue_cmdlist().

Therefore, function arm_smmu_cmdq_issue_cmd_with_sync() is added to insert
the 'cmd+sync' commands at a time.

Signed-off-by: default avatarZhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/20210811114852.2429-3-thunder.leizhen@huawei.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent eff19474

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

+19 −16
Original line number Diff line number Diff line
@@ -845,8 +845,9 @@ static int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu, 
	return ret;

}



static int arm_smmu_cmdq_issue_cmd(struct arm_smmu_device *smmu,

				   struct arm_smmu_cmdq_ent *ent)

static int __arm_smmu_cmdq_issue_cmd(struct arm_smmu_device *smmu,

				     struct arm_smmu_cmdq_ent *ent,

				     bool sync)

{

	u64 cmd[CMDQ_ENT_DWORDS];
@@ -856,12 +857,19 @@ static int arm_smmu_cmdq_issue_cmd(struct arm_smmu_device *smmu, 
		return -EINVAL;

	}



	return arm_smmu_cmdq_issue_cmdlist(smmu, cmd, 1, false);

	return arm_smmu_cmdq_issue_cmdlist(smmu, cmd, 1, sync);

}



static int arm_smmu_cmdq_issue_cmd(struct arm_smmu_device *smmu,

				   struct arm_smmu_cmdq_ent *ent)

{

	return __arm_smmu_cmdq_issue_cmd(smmu, ent, false);

}



static int arm_smmu_cmdq_issue_sync(struct arm_smmu_device *smmu)

static int arm_smmu_cmdq_issue_cmd_with_sync(struct arm_smmu_device *smmu,

					     struct arm_smmu_cmdq_ent *ent)

{

	return arm_smmu_cmdq_issue_cmdlist(smmu, NULL, 0, true);

	return __arm_smmu_cmdq_issue_cmd(smmu, ent, true);

}



static void arm_smmu_cmdq_batch_add(struct arm_smmu_device *smmu,
@@ -929,8 +937,7 @@ void arm_smmu_tlb_inv_asid(struct arm_smmu_device *smmu, u16 asid) 
		.tlbi.asid = asid,

	};



	arm_smmu_cmdq_issue_cmd(smmu, &cmd);

	arm_smmu_cmdq_issue_sync(smmu);

	arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd);

}



static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
@@ -1211,8 +1218,7 @@ static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid) 
		},

	};



	arm_smmu_cmdq_issue_cmd(smmu, &cmd);

	arm_smmu_cmdq_issue_sync(smmu);

	arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd);

}



static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
@@ -1824,8 +1830,7 @@ static void arm_smmu_tlb_inv_context(void *cookie) 
	} else {

		cmd.opcode	= CMDQ_OP_TLBI_S12_VMALL;

		cmd.tlbi.vmid	= smmu_domain->s2_cfg.vmid;

		arm_smmu_cmdq_issue_cmd(smmu, &cmd);

		arm_smmu_cmdq_issue_sync(smmu);

		arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd);

	}

	arm_smmu_atc_inv_domain(smmu_domain, 0, 0, 0);

}
@@ -3339,18 +3344,16 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) 


	/* Invalidate any cached configuration */

	cmd.opcode = CMDQ_OP_CFGI_ALL;

	arm_smmu_cmdq_issue_cmd(smmu, &cmd);

	arm_smmu_cmdq_issue_sync(smmu);

	arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd);



	/* Invalidate any stale TLB entries */

	if (smmu->features & ARM_SMMU_FEAT_HYP) {

		cmd.opcode = CMDQ_OP_TLBI_EL2_ALL;

		arm_smmu_cmdq_issue_cmd(smmu, &cmd);

		arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd);

	}



	cmd.opcode = CMDQ_OP_TLBI_NSNH_ALL;

	arm_smmu_cmdq_issue_cmd(smmu, &cmd);

	arm_smmu_cmdq_issue_sync(smmu);

	arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd);



	/* Event queue */

	writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE);