Commit 4529b884 authored by Nanyong Sun's avatar Nanyong Sun
Browse files

arm64: mm: HVO: support BBM of vmemmap pgtable safely 

hulk inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8YLWW



--------------------------------

Implement vmemmap_update_pmd and vmemmap_update_pte on arm64 to do
BBM(break-before-make) logic when change the page table of vmemmap
address, they will under the init_mm.page_table_lock.
If a translation fault of vmemmap address concurrently happened after
pte/pmd cleared, vmemmap page fault handler will acquire the
init_mm.page_table_lock to wait for vmemmap update to complete,
by then the virtual address is valid again, so PF can return and
access can continue.
In other case, do the traditional kernel fault.

Implement vmemmap_flush_tlb_all/range on arm64 with nothing
to do because tlb already flushed in every single BBM.

Fixes: 1e63ac08 ("arm64: mm: hugetlb: enable HUGETLB_PAGE_FREE_VMEMMAP for arm64")
Signed-off-by: default avatarNanyong Sun <sunnanyong@huawei.com>
parent 8dced77d

arch/arm64/include/asm/esr.h

+4 −0
Original line number Diff line number Diff line
@@ -112,6 +112,10 @@ 
#define ESR_ELx_FSC_SERROR	(0x11)

#define ESR_ELx_FSC_ACCESS	(0x08)

#define ESR_ELx_FSC_FAULT	(0x04)

#define ESR_ELx_FSC_FAULT_L0    (0x04)

#define ESR_ELx_FSC_FAULT_L1    (0x05)

#define ESR_ELx_FSC_FAULT_L2    (0x06)

#define ESR_ELx_FSC_FAULT_L3    (0x07)

#define ESR_ELx_FSC_PERM	(0x0C)



/* ISS field definitions for Data Aborts */

arch/arm64/include/asm/pgtable.h

+6 −0
Original line number Diff line number Diff line
@@ -1038,6 +1038,12 @@ static inline pgprot_t arch_filter_pgprot(pgprot_t prot) 
	return PAGE_READONLY_EXEC;

}



#ifdef CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP

void vmemmap_update_pmd(unsigned long addr, pmd_t *pmdp, pte_t *ptep);

#define vmemmap_update_pmd vmemmap_update_pmd

void vmemmap_update_pte(unsigned long addr, pte_t *ptep, pte_t pte);

#define vmemmap_update_pte vmemmap_update_pte

#endif



#endif /* !__ASSEMBLY__ */

arch/arm64/include/asm/tlbflush.h

+16 −0
Original line number Diff line number Diff line
@@ -441,6 +441,22 @@ static inline void __flush_tlb_kernel_pgtable(unsigned long kaddr) 
	dsb(ish);

	isb();

}



#ifdef CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP

static inline void vmemmap_flush_tlb_all(void)

{

	/* do nothing, already flushed tlb in every single BBM */

}

#define vmemmap_flush_tlb_all vmemmap_flush_tlb_all



static inline void vmemmap_flush_tlb_range(unsigned long start,

					   unsigned long end)

{

	/* do nothing, already flushed tlb in every single BBM */

}

#define vmemmap_flush_tlb_range vmemmap_flush_tlb_range

#endif



#endif



#endif

arch/arm64/mm/fault.c

+89 −5
Original line number Diff line number Diff line
@@ -299,6 +299,85 @@ static void die_kernel_fault(const char *msg, unsigned long addr, 
	do_exit(SIGKILL);

}



#ifdef CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP

static inline bool vmemmap_fault_may_fixup(unsigned long addr,

					   unsigned long esr)

{

	if (!hugetlb_optimize_vmemmap_enabled())

		return false;



	if (addr < VMEMMAP_START || addr >= VMEMMAP_END)

		return false;



	/*

	 * Only try to handle translation fault level 2 or level 3,

	 * because hugetlb vmemmap optimize only clear pmd or pte.

	 */

	switch (esr & ESR_ELx_FSC) {

	case ESR_ELx_FSC_FAULT_L2:

	case ESR_ELx_FSC_FAULT_L3:

		return true;

	default:

		return false;

	}

}



/*

 * PMD mapped vmemmap should has been split as PTE mapped

 * by HVO now, here we only check this case, other cases

 * should fail.

 * Also should check the addr is healthy enough that will not cause

 * a level2 or level3 translation fault again after page fault

 * handled with success, so we need check both bits[1:0] of PMD and

 * PTE as ARM Spec mentioned below:

 * A Translation fault is generated if bits[1:0] of a translation

 * table descriptor identify the descriptor as either a Fault

 * encoding or a reserved encoding.

 */

static inline bool vmemmap_addr_healthy(unsigned long addr)

{

	pmd_t *pmdp, pmd;

	pte_t *ptep, pte;



	pmdp = pmd_off_k(addr);

	pmd = READ_ONCE(*pmdp);

	if (!pmd_table(pmd))

		return false;



	ptep = pte_offset_kernel(pmdp, addr);

	pte = ptep_get(ptep);

	return (pte_val(pte) & PTE_TYPE_MASK) == PTE_TYPE_PAGE;

}



static bool vmemmap_handle_page_fault(unsigned long addr,

				      unsigned long esr)

{

	bool ret;

	unsigned long flags;



	if (likely(!vmemmap_fault_may_fixup(addr, esr)))

		return false;



	spin_lock_irqsave(&init_mm.page_table_lock, flags);

	ret = vmemmap_addr_healthy(addr);

	spin_unlock_irqrestore(&init_mm.page_table_lock, flags);



	return ret;

}

#else

static inline bool vmemmap_fault_may_fixup(unsigned long addr,

					   unsigned long esr)

{

	return false;

}



static inline bool vmemmap_handle_page_fault(unsigned long addr,

					     unsigned long esr)

{

	return false;

}

#endif /* CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP */



static bool is_translation_fault(unsigned long esr)

{

	return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_FAULT;
@@ -316,9 +395,11 @@ static void __do_kernel_fault(unsigned long addr, unsigned int esr, 
	if (!is_el1_instruction_abort(esr) && fixup_exception(regs))

		return;



	if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),

	    "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))

	if (is_spurious_el1_translation_fault(addr, esr, regs)) {

		WARN_RATELIMIT(!vmemmap_fault_may_fixup(addr, esr),

		"Ignoring spurious kernel translation fault at virtual address %016lx\n", addr);

		return;

	}



	if (is_el1_permission_fault(addr, esr, regs)) {

		if (esr & ESR_ELx_WNR)
@@ -330,9 +411,12 @@ static void __do_kernel_fault(unsigned long addr, unsigned int esr, 
	} else if (addr < PAGE_SIZE) {

		msg = "NULL pointer dereference";

	} else {

		if (is_translation_fault(esr) &&

		    kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))

		if (is_translation_fault(esr)) {

			if (kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))

				return;

			if (vmemmap_handle_page_fault(addr, esr))

				return;

		}



		msg = "paging request";

	}

arch/arm64/mm/mmu.c

+29 −0
Original line number Diff line number Diff line
@@ -1148,6 +1148,35 @@ static void free_empty_tables(unsigned long addr, unsigned long end, 
#endif



#ifdef CONFIG_SPARSEMEM_VMEMMAP



#ifdef CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP

/*

 * In the window between the page table entry is cleared and filled

 * with a new value, other threads have the opportunity to concurrently

 * access the vmemmap area then page translation fault occur.

 * Therefore, we need to ensure that the init_mm.page_table_lock is held

 * to synchronize the vmemmap page fault handling which will wait for

 * this lock to be released to ensure that the page table entry has been

 * refreshed with a new valid value.

 */

void vmemmap_update_pmd(unsigned long addr, pmd_t *pmdp, pte_t *ptep)

{

	lockdep_assert_held(&init_mm.page_table_lock);

	pmd_clear(pmdp);

	flush_tlb_kernel_range(addr, addr + PMD_SIZE);

	pmd_populate_kernel(&init_mm, pmdp, ptep);

}



void vmemmap_update_pte(unsigned long addr, pte_t *ptep, pte_t pte)

{

	spin_lock_irq(&init_mm.page_table_lock);

	pte_clear(&init_mm, addr, ptep);

	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);

	set_pte_at(&init_mm, addr, ptep, pte);

	spin_unlock_irq(&init_mm.page_table_lock);

}

#endif



#if !ARM64_SWAPPER_USES_SECTION_MAPS

int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,

		struct vmem_altmap *altmap)