Commit 4511624a authored by Lang Cheng's avatar Lang Cheng Committed by Jason Gunthorpe
Browse files

RDMA/hns: Rename CMDQ head/tail pointer to PI/CI 

The same name represents opposite meanings in new/old driver, it is hard
to maintain, so rename them to PI/CI.

Link: https://lore.kernel.org/r/1621482876-35780-2-git-send-email-liweihang@huawei.com


Signed-off-by: default avatarLang Cheng <chenglang@huawei.com>
Signed-off-by: default avatarWeihang Li <liweihang@huawei.com>
Reviewed-by: default avatarLeon Romanovsky <leonro@nvidia.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parent b6989da8

drivers/infiniband/hw/hns/hns_roce_common.h

+2 −2
Original line number Diff line number Diff line
@@ -373,8 +373,8 @@ 
#define ROCEE_TX_CMQ_BASEADDR_L_REG		0x07000

#define ROCEE_TX_CMQ_BASEADDR_H_REG		0x07004

#define ROCEE_TX_CMQ_DEPTH_REG			0x07008

#define ROCEE_TX_CMQ_HEAD_REG			0x07010

#define ROCEE_TX_CMQ_TAIL_REG			0x07014

#define ROCEE_TX_CMQ_PI_REG			0x07010

#define ROCEE_TX_CMQ_CI_REG			0x07014



#define ROCEE_RX_CMQ_BASEADDR_L_REG		0x07018

#define ROCEE_RX_CMQ_BASEADDR_H_REG		0x0701c

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+5 −5
Original line number Diff line number Diff line
@@ -1255,8 +1255,8 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type) 
			   (u32)ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);



		/* Make sure to write tail first and then head */

		roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0);

		roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0);

		roce_write(hr_dev, ROCEE_TX_CMQ_CI_REG, 0);

		roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, 0);

	} else {

		roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_L_REG, (u32)dma);

		roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_H_REG,
@@ -1338,7 +1338,7 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc, 


static int hns_roce_cmq_csq_done(struct hns_roce_dev *hr_dev)

{

	u32 tail = roce_read(hr_dev, ROCEE_TX_CMQ_TAIL_REG);

	u32 tail = roce_read(hr_dev, ROCEE_TX_CMQ_CI_REG);

	struct hns_roce_v2_priv *priv = hr_dev->priv;



	return tail == priv->cmq.csq.head;
@@ -1366,7 +1366,7 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev, 
	}



	/* Write to hardware */

	roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, csq->head);

	roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, csq->head);



	/* If the command is sync, wait for the firmware to write back,

	 * if multi descriptors to be sent, use the first one to check
@@ -1397,7 +1397,7 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev, 
		}

	} else {

		/* FW/HW reset or incorrect number of desc */

		tail = roce_read(hr_dev, ROCEE_TX_CMQ_TAIL_REG);

		tail = roce_read(hr_dev, ROCEE_TX_CMQ_CI_REG);

		dev_warn(hr_dev->dev, "CMDQ move tail from %d to %d\n",

			 csq->head, tail);

		csq->head = tail;