Unverified Commit 4509410b authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!9191 [OLK-6.6] x86/cpu: Remove pointless evaluation of x86_coreid_bits

Merge Pull Request from: @leoliu-oc 
 
cpuinfo_x86::x86_coreid_bits is only used by the AMD numa topology code. No point in evaluating it on non AMD systems.

No functional change.

### Issue
https://gitee.com/openeuler/kernel/issues/IA6KR9

### Default config Changes
N/A

### Test
Pass. 
 
Link:https://gitee.com/openeuler/kernel/pulls/9191

 

Reviewed-by: default avatarZhang Peng <zhangpeng362@huawei.com>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 37f4f983 e96a1f69
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+0 −13
Original line number Diff line number Diff line
@@ -398,19 +398,6 @@ static void early_init_intel(struct cpuinfo_x86 *c)
		setup_clear_cpu_cap(X86_FEATURE_PGE);
	}

	if (c->cpuid_level >= 0x00000001) {
		u32 eax, ebx, ecx, edx;

		cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
		/*
		 * If HTT (EDX[28]) is set EBX[16:23] contain the number of
		 * apicids which are reserved per package. Store the resulting
		 * shift value for the package management code.
		 */
		if (edx & (1U << 28))
			c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);
	}

	check_memory_type_self_snoop_errata(c);

	/*
+0 −13
Original line number Diff line number Diff line
@@ -66,19 +66,6 @@ static void early_init_zhaoxin(struct cpuinfo_x86 *c)
		set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
	}

	if (c->cpuid_level >= 0x00000001) {
		u32 eax, ebx, ecx, edx;

		cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
		/*
		 * If HTT (EDX[28]) is set EBX[16:23] contain the number of
		 * apicids which are reserved per package. Store the resulting
		 * shift value for the package management code.
		 */
		if (edx & (1U << 28))
			c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);
	}

	if (cpuid_eax(0xC0000000) >= 0xC0000006)
		c->x86_capability[CPUID_C000_0006_EAX] = cpuid_eax(0xC0000006);