Commit 44db63d1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2021-06-25' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "This is a bit bigger than I'd like at this stage, and I guess last
  week was extra quiet, but it's mostly one fix across three drivers to
  wait for buffer move pinning to complete.

  There was one locking change that got reverted so it's just noise.

  Otherwise the amdgpu/nouveau changes are for known regressions, and
  otherwise it's just misc changes in kmb/atmel/vc4 drivers.

  Summary:

  core:
   - auth locking change + brown paper bag revert

  radeon/nouveau/amdgpu/ttm:
   - wait for BO to be pinned after moving it (same fix in three
     drivers)

  amdgpu:
   - Revert GFX9/10 doorbell fixes, we just end up trading one bug for
     another
   - Potential memory corruption fix in framebuffer handling

  nouveau:
   - fix regression checking dma addresses

  kmb:
   - error return fix

  atmel-hlcdc:
   - fix kernel warnings at boot
   - enable async flips

  vc4:
   - fix CPU hang due to power management"

* tag 'drm-fixes-2021-06-25' of git://anongit.freedesktop.org/drm/drm:
  drm/nouveau: fix dma_address check for CPU/GPU sync
  drm/kmb: Fix error return code in kmb_hw_init()
  drm/amdgpu: wait for moving fence after pinning
  drm/radeon: wait for moving fence after pinning
  drm/nouveau: wait for moving fence after pinning v2
  Revert "drm: add a locked version of drm_is_current_master"
  Revert "drm/amdgpu/gfx9: fix the doorbell missing when in CGPG issue."
  Revert "drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full doorbell."
  drm/amdgpu: Call drm_framebuffer_init last for framebuffer init
  drm: add a locked version of drm_is_current_master
  drm/atmel-hlcdc: Allow async page flips
  drm/panel: ld9040: reference spi_device_id table
  drm: atmel_hlcdc: Enable the crtc vblank prior to crtc usage.
  drm/vc4: hdmi: Make sure the controller is powered in detect
  drm/vc4: hdmi: Move the HSM clock enable to runtime_pm
parents 4a09d388 5e0e7a40

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

+7 −5
Original line number Diff line number Diff line
@@ -1047,11 +1047,12 @@ int amdgpu_display_gem_fb_init(struct drm_device *dev, 


	rfb->base.obj[0] = obj;

	drm_helper_mode_fill_fb_struct(dev, &rfb->base, mode_cmd);

	ret = drm_framebuffer_init(dev, &rfb->base, &amdgpu_fb_funcs);



	ret = amdgpu_display_framebuffer_init(dev, rfb, mode_cmd, obj);

	if (ret)

		goto err;



	ret = amdgpu_display_framebuffer_init(dev, rfb, mode_cmd, obj);

	ret = drm_framebuffer_init(dev, &rfb->base, &amdgpu_fb_funcs);

	if (ret)

		goto err;
@@ -1071,9 +1072,6 @@ int amdgpu_display_gem_fb_verify_and_init( 


	rfb->base.obj[0] = obj;

	drm_helper_mode_fill_fb_struct(dev, &rfb->base, mode_cmd);

	ret = drm_framebuffer_init(dev, &rfb->base, &amdgpu_fb_funcs);

	if (ret)

		goto err;

	/* Verify that the modifier is supported. */

	if (!drm_any_plane_has_format(dev, mode_cmd->pixel_format,

				      mode_cmd->modifier[0])) {
@@ -1092,6 +1090,10 @@ int amdgpu_display_gem_fb_verify_and_init( 
	if (ret)

		goto err;



	ret = drm_framebuffer_init(dev, &rfb->base, &amdgpu_fb_funcs);

	if (ret)

		goto err;



	return 0;

err:

	drm_dbg_kms(dev, "Failed to verify and init gem fb: %d\n", ret);

drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c

+13 −1
Original line number Diff line number Diff line
@@ -214,9 +214,21 @@ static int amdgpu_dma_buf_pin(struct dma_buf_attachment *attach) 
{

	struct drm_gem_object *obj = attach->dmabuf->priv;

	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);

	int r;



	/* pin buffer into GTT */

	return amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);

	r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);

	if (r)

		return r;



	if (bo->tbo.moving) {

		r = dma_fence_wait(bo->tbo.moving, true);

		if (r) {

			amdgpu_bo_unpin(bo);

			return r;

		}

	}

	return 0;

}



/**

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+1 −5
Original line number Diff line number Diff line
@@ -6871,12 +6871,8 @@ static int gfx_v10_0_kiq_init_register(struct amdgpu_ring *ring) 
	if (ring->use_doorbell) {

		WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,

			(adev->doorbell_index.kiq * 2) << 2);

		/* If GC has entered CGPG, ringing doorbell > first page doesn't

		 * wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround

		 * this issue.

		 */

		WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,

			(adev->doorbell.size - 4));

			(adev->doorbell_index.userqueue_end * 2) << 2);

	}



	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+1 −5
Original line number Diff line number Diff line
@@ -3673,12 +3673,8 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring) 
	if (ring->use_doorbell) {

		WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,

					(adev->doorbell_index.kiq * 2) << 2);

		/* If GC has entered CGPG, ringing doorbell > first page doesn't

		 * wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround

		 * this issue.

		 */

		WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,

					(adev->doorbell.size - 4));

					(adev->doorbell_index.userqueue_end * 2) << 2);

	}



	WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

+10 −7
Original line number Diff line number Diff line
@@ -232,7 +232,6 @@ static void atmel_hlcdc_crtc_atomic_enable(struct drm_crtc *c, 


	pm_runtime_put_sync(dev->dev);



	drm_crtc_vblank_on(c);

}



#define ATMEL_HLCDC_RGB444_OUTPUT	BIT(0)
@@ -343,8 +342,17 @@ static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c, 


static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c,

					  struct drm_atomic_state *state)

{

	drm_crtc_vblank_on(c);

}



static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *c,

					  struct drm_atomic_state *state)

{

	struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);

	unsigned long flags;



	spin_lock_irqsave(&c->dev->event_lock, flags);



	if (c->state->event) {

		c->state->event->pipe = drm_crtc_index(c);
@@ -354,12 +362,7 @@ static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c, 
		crtc->event = c->state->event;

		c->state->event = NULL;

	}

}



static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc,

					  struct drm_atomic_state *state)

{

	/* TODO: write common plane control register if available */

	spin_unlock_irqrestore(&c->dev->event_lock, flags);

}



static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {