Commit 44b07120 authored by Rex-BC Chen's avatar Rex-BC Chen Committed by Chun-Kuang Hu
Browse files

drm/mediatek: dpi: Add check for max clock rate in mode_valid



Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.

Signed-off-by: default avatarPi-Hsun Shih <pihsun@chromium.org>
Signed-off-by: default avatarRex-BC Chen <rex-bc.chen@mediatek.com>
Signed-off-by: default avatarJitao Shi <jitao.shi@mediatek.com>
Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent ee5ee188
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+18 −0
Original line number Diff line number Diff line
@@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
struct mtk_dpi_conf {
	unsigned int (*cal_factor)(int clock);
	u32 reg_h_fre_con;
	u32 max_clock_khz;
	bool edge_sel_en;
};

@@ -557,9 +558,23 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
	mtk_dpi_set_display_mode(dpi, &dpi->mode);
}

static enum drm_mode_status
mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
			  const struct drm_display_info *info,
			  const struct drm_display_mode *mode)
{
	struct mtk_dpi *dpi = bridge_to_dpi(bridge);

	if (mode->clock > dpi->conf->max_clock_khz)
		return MODE_CLOCK_HIGH;

	return MODE_OK;
}

static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
	.attach = mtk_dpi_bridge_attach,
	.mode_set = mtk_dpi_bridge_mode_set,
	.mode_valid = mtk_dpi_bridge_mode_valid,
	.disable = mtk_dpi_bridge_disable,
	.enable = mtk_dpi_bridge_enable,
};
@@ -668,17 +683,20 @@ static unsigned int mt8183_calculate_factor(int clock)
static const struct mtk_dpi_conf mt8173_conf = {
	.cal_factor = mt8173_calculate_factor,
	.reg_h_fre_con = 0xe0,
	.max_clock_khz = 300000,
};

static const struct mtk_dpi_conf mt2701_conf = {
	.cal_factor = mt2701_calculate_factor,
	.reg_h_fre_con = 0xb0,
	.edge_sel_en = true,
	.max_clock_khz = 150000,
};

static const struct mtk_dpi_conf mt8183_conf = {
	.cal_factor = mt8183_calculate_factor,
	.reg_h_fre_con = 0xe0,
	.max_clock_khz = 100000,
};

static int mtk_dpi_probe(struct platform_device *pdev)