Commit 44a5b6b5 authored Sep 14, 2023 by Mark Brown Committed by Will Deacon Sep 18, 2023

arm64: Document missing userspace visible fields in ID_AA64ISAR2_EL1



We have exposed a number of fields in ID_AA64ISAR2_EL1 to userspace without
adding the matching documentation in cpu-feature-registers.rst, update it
to match the implementation.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Link: https://lore.kernel.org/r/20230914-arm64-feat-hbc-doc-v1-2-797d25f06897@kernel.org


Signed-off-by: Will Deacon <will@kernel.org>

parent 5ad361f4

Documentation/arch/arm64/cpu-feature-registers.rst

+10 −0

Original line number	Diff line number	Diff line
		@@ -290,8 +290,18 @@ infrastructure:
		+------------------------------+---------+---------+
		\| Name \| bits \| visible \|
		+------------------------------+---------+---------+
		\| CSSC \| [55-52] \| y \|
		+------------------------------+---------+---------+
		\| RPRFM \| [51-48] \| y \|
		+------------------------------+---------+---------+
		\| BC \| [23-20] \| y \|
		+------------------------------+---------+---------+
		\| MOPS \| [19-16] \| y \|
		+------------------------------+---------+---------+
		\| APA3 \| [15-12] \| y \|
		+------------------------------+---------+---------+
		\| GPA3 \| [11-8] \| y \|
		+------------------------------+---------+---------+
		\| RPRES \| [7-4] \| y \|
		+------------------------------+---------+---------+
		\| WFXT \| [3-0] \| y \|