Commit 449f6bc1 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 

Cross-merge networking fixes after downstream PR.

Conflicts:

net/sched/sch_taprio.c
  d636fc5d ("net: sched: add rcu annotations around qdisc->qdisc_sleeping")
  dced11ef ("net/sched: taprio: don't overwrite "sch" variable in taprio_dump_class_stats()")

net/ipv4/sysctl_net_ipv4.c
  e209fee4 ("net/ipv4: ping_group_range: allow GID from 2147483648 to 4294967294")
  ccce324d ("tcp: make the first N SYN RTO backoffs linear")
https://lore.kernel.org/all/20230605100816.08d41a7b@canb.auug.org.au/



No adjacent changes.

Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents bfd019d1 25041a4c

Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml

+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# 
title: Lattice Slave SPI sysCONFIG FPGA manager



maintainers:

  - Ivan Bornyakov <i.bornyakov@metrotek.ru>

  - Vladimir Georgiev <v.georgiev@metrotek.ru>



description: |

  Lattice sysCONFIG port, which is used for FPGA configuration, among others,

Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml

+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# 
title: Microchip Polarfire FPGA manager.



maintainers:

  - Ivan Bornyakov <i.bornyakov@metrotek.ru>

  - Vladimir Georgiev <v.georgiev@metrotek.ru>



description:

  Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to

Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml

+7 −0
Original line number Diff line number Diff line
@@ -39,6 +39,12 @@ properties: 
  power-domains:

    maxItems: 1



  vref-supply:

    description: |

      External ADC reference voltage supply on VREFH pad. If VERID[MVI] is

      set, there are additional, internal reference voltages selectable.

      VREFH1 is always from VREFH pad.



  "#io-channel-cells":

    const: 1
@@ -72,6 +78,7 @@ examples: 
            assigned-clocks = <&clk IMX_SC_R_ADC_0>;

            assigned-clock-rates = <24000000>;

            power-domains = <&pd IMX_SC_R_ADC_0>;

            vref-supply = <&reg_1v8>;

            #io-channel-cells = <1>;

        };

    };

Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml

+1 −1
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@ patternProperties: 
            of the MAX chips to the GyroADC, while MISO line of each Maxim

            ADC connects to a shared input pin of the GyroADC.

        enum:

          - adi,7476

          - adi,ad7476

          - fujitsu,mb88101a

          - maxim,max1162

          - maxim,max11100

Documentation/devicetree/bindings/serial/8250_omap.yaml

+1 −0
Original line number Diff line number Diff line
@@ -70,6 +70,7 @@ properties: 
  dsr-gpios: true

  rng-gpios: true

  dcd-gpios: true

  rs485-rts-active-high: true

  rts-gpio: true

  power-domains: true

  clock-frequency: true