Commit 4499d488 authored by Swati Sharma's avatar Swati Sharma Committed by Jani Nikula
Browse files

drm/edid: Parse MAX_FRL field from HFVSDB block 



This patch parses MAX_FRL field to get the MAX rate in Gbps that
the HDMI 2.1 panel can support in FRL mode. Source need this
field to determine the optimal rate between the source and sink
during FRL training.

v2: Fixed minor bugs, and removed extra wrapper function (Uma Shankar)

Signed-off-by: default avatarSwati Sharma <swati2.sharma@intel.com>
Signed-off-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch FROM_SIGN_OFF_MISMATCH, PARENTHESIS_ALIGNMENT.]
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-3-ankit.k.nautiyal@intel.com
parent 9bb85a6e

drivers/gpu/drm/drm_edid.c

+44 −0
Original line number Diff line number Diff line
@@ -4849,6 +4849,41 @@ static void drm_parse_vcdb(struct drm_connector *connector, const u8 *db) 
		info->rgb_quant_range_selectable = true;

}



static

void drm_get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8 *max_rate_per_lane)

{

	switch (max_frl_rate) {

	case 1:

		*max_lanes = 3;

		*max_rate_per_lane = 3;

		break;

	case 2:

		*max_lanes = 3;

		*max_rate_per_lane = 6;

		break;

	case 3:

		*max_lanes = 4;

		*max_rate_per_lane = 6;

		break;

	case 4:

		*max_lanes = 4;

		*max_rate_per_lane = 8;

		break;

	case 5:

		*max_lanes = 4;

		*max_rate_per_lane = 10;

		break;

	case 6:

		*max_lanes = 4;

		*max_rate_per_lane = 12;

		break;

	case 0:

	default:

		*max_lanes = 0;

		*max_rate_per_lane = 0;

	}

}



static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,

					       const u8 *db)

{
@@ -4902,6 +4937,15 @@ static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector, 
		}

	}



	if (hf_vsdb[7]) {

		u8 max_frl_rate;



		DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");

		max_frl_rate = (hf_vsdb[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;

		drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,

				     &hdmi->max_frl_rate_per_lane);

	}



	drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb);

}

include/drm/drm_connector.h

+6 −0
Original line number Diff line number Diff line
@@ -207,6 +207,12 @@ struct drm_hdmi_info { 


	/** @y420_dc_modes: bitmap of deep color support index */

	u8 y420_dc_modes;



	/** @max_frl_rate_per_lane: support fixed rate link */

	u8 max_frl_rate_per_lane;



	/** @max_lanes: supported by sink */

	u8 max_lanes;

};



/**