Commit 444fbf5d authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/gt: Declare gen9 has 64 mocs entries! 



We checked the table size against a hardcoded number of entries, and
that number was excluding the special mocs registers at the end.

Fixes: 977933b5 ("drm/i915/gt: Program mocs:63 for cache eviction on gen9")
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: <stable@vger.kernel.org> # v4.3+
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201127102540.13117-1-chris@chris-wilson.co.uk
parent 85cc2917

drivers/gpu/drm/i915/gt/intel_mocs.c

+4 −5
Original line number Diff line number Diff line
@@ -59,8 +59,7 @@ struct drm_i915_mocs_table { 
#define _L3_CACHEABILITY(value)	((value) << 4)



/* Helper defines */

#define GEN9_NUM_MOCS_ENTRIES	62  /* 62 out of 64 - 63 & 64 are reserved. */

#define GEN11_NUM_MOCS_ENTRIES	64  /* 63-64 are reserved, but configured. */

#define GEN9_NUM_MOCS_ENTRIES	64  /* 63-64 are reserved, but configured. */



/* (e)LLC caching options */

/*
@@ -361,15 +360,15 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915, 
	if (IS_DG1(i915)) {

		table->size = ARRAY_SIZE(dg1_mocs_table);

		table->table = dg1_mocs_table;

		table->n_entries = GEN11_NUM_MOCS_ENTRIES;

		table->n_entries = GEN9_NUM_MOCS_ENTRIES;

	} else if (INTEL_GEN(i915) >= 12) {

		table->size  = ARRAY_SIZE(tgl_mocs_table);

		table->table = tgl_mocs_table;

		table->n_entries = GEN11_NUM_MOCS_ENTRIES;

		table->n_entries = GEN9_NUM_MOCS_ENTRIES;

	} else if (IS_GEN(i915, 11)) {

		table->size  = ARRAY_SIZE(icl_mocs_table);

		table->table = icl_mocs_table;

		table->n_entries = GEN11_NUM_MOCS_ENTRIES;

		table->n_entries = GEN9_NUM_MOCS_ENTRIES;

	} else if (IS_GEN9_BC(i915) || IS_CANNONLAKE(i915)) {

		table->size  = ARRAY_SIZE(skl_mocs_table);

		table->n_entries = GEN9_NUM_MOCS_ENTRIES;