Commit 43ffcd6f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.6-2023-09-06' of... 

Merge tag 'amd-drm-fixes-6.6-2023-09-06' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-next

amd-drm-fixes-6.6-2023-09-06:

amdgpu:
- Display replay fixes
- Fixes for headless boards
- Fix documentation breakage
- RAS fixes
- Handle newer IP discovery tables
- SMU 13.0.6 fixes
- SR-IOV fixes
- Display vstartup fixes
- NBIO 7.9 fixes
- Display scaling mode fixes
- Debugfs power reporting fix
- GC 9.4.3 fixes
- Dirty framebuffer fixes for fbcon
- eDP fixes
- DCN 3.1.5 fix
- Display ODM fixes
- GPU core dump fix
- Re-enable zops property now that IGT test is fixed
- Fix possible UAF in CS code
- Cursor degamma fix

amdkfd:
- HMM fixes
- Interrupt masking fix
- GFX11 MQD fixes

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230907033049.7811-1-alexander.deucher@amd.com
parents 51eed9d4 fbe1a9e0

Documentation/gpu/amdgpu/driver-misc.rst

+4 −4
Original line number Diff line number Diff line
@@ -11,19 +11,19 @@ via sysfs 
product_name

------------



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c

   :doc: product_name



product_number

--------------



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

   :doc: product_name

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c

   :doc: product_number



serial_number

-------------



.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c

   :doc: serial_number



unique_id

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+2 −6
Original line number Diff line number Diff line
@@ -442,9 +442,7 @@ void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev, 
			mem_info->local_mem_size_public,

			mem_info->local_mem_size_private);



	if (amdgpu_sriov_vf(adev))

		mem_info->mem_clk_max = adev->clock.default_mclk / 100;

	else if (adev->pm.dpm_enabled) {

	if (adev->pm.dpm_enabled) {

		if (amdgpu_emu_mode == 1)

			mem_info->mem_clk_max = 0;

		else
@@ -463,9 +461,7 @@ uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct amdgpu_device *adev) 
uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct amdgpu_device *adev)

{

	/* the sclk is in quantas of 10kHz */

	if (amdgpu_sriov_vf(adev))

		return adev->clock.default_sclk / 100;

	else if (adev->pm.dpm_enabled)

	if (adev->pm.dpm_enabled)

		return amdgpu_dpm_get_sclk(adev, false) / 100;

	else

		return 100;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

+16 −2
Original line number Diff line number Diff line
@@ -217,6 +217,7 @@ union umc_info { 
	struct atom_umc_info_v3_1 v31;

	struct atom_umc_info_v3_2 v32;

	struct atom_umc_info_v3_3 v33;

	struct atom_umc_info_v4_0 v40;

};



union vram_info {
@@ -508,9 +509,8 @@ bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev) 


	if (amdgpu_atom_parse_data_header(mode_info->atom_context,

				index, &size, &frev, &crev, &data_offset)) {

		umc_info = (union umc_info *)(mode_info->atom_context->bios + data_offset);

		if (frev == 3) {

			umc_info = (union umc_info *)

				(mode_info->atom_context->bios + data_offset);

			switch (crev) {

			case 1:

				umc_config = le32_to_cpu(umc_info->v31.umc_config);
@@ -533,6 +533,20 @@ bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev) 
				/* unsupported crev */

				return false;

			}

		} else if (frev == 4) {

			switch (crev) {

			case 0:

				umc_config1 = le32_to_cpu(umc_info->v40.umc_config1);

				ecc_default_enabled =

					(umc_config1 & UMC_CONFIG1__ENABLE_ECC_CAPABLE) ? true : false;

				break;

			default:

				/* unsupported crev */

				return false;

			}

		} else {

			/* unsupported frev */

			return false;

		}

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+4 −14
Original line number Diff line number Diff line
@@ -127,7 +127,6 @@ static int amdgpu_cs_p1_user_fence(struct amdgpu_cs_parser *p, 
{

	struct drm_gem_object *gobj;

	unsigned long size;

	int r;



	gobj = drm_gem_object_lookup(p->filp, data->handle);

	if (gobj == NULL)
@@ -137,23 +136,14 @@ static int amdgpu_cs_p1_user_fence(struct amdgpu_cs_parser *p, 
	drm_gem_object_put(gobj);



	size = amdgpu_bo_size(p->uf_bo);

	if (size != PAGE_SIZE || (data->offset + 8) > size) {

		r = -EINVAL;

		goto error_unref;

	}

	if (size != PAGE_SIZE || data->offset > (size - 8))

		return -EINVAL;



	if (amdgpu_ttm_tt_get_usermm(p->uf_bo->tbo.ttm)) {

		r = -EINVAL;

		goto error_unref;

	}

	if (amdgpu_ttm_tt_get_usermm(p->uf_bo->tbo.ttm))

		return -EINVAL;



	*offset = data->offset;



	return 0;



error_unref:

	amdgpu_bo_unref(&p->uf_bo);

	return r;

}



static int amdgpu_cs_p1_bo_handles(struct amdgpu_cs_parser *p,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+25 −5
Original line number Diff line number Diff line
@@ -885,15 +885,22 @@ static void amdgpu_block_invalid_wreg(struct amdgpu_device *adev, 
 */

static int amdgpu_device_asic_init(struct amdgpu_device *adev)

{

	int ret;



	amdgpu_asic_pre_asic_init(adev);



	if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3) ||

	    adev->ip_versions[GC_HWIP][0] >= IP_VERSION(11, 0, 0))

		return amdgpu_atomfirmware_asic_init(adev, true);

	else

	    adev->ip_versions[GC_HWIP][0] >= IP_VERSION(11, 0, 0)) {

		amdgpu_psp_wait_for_bootloader(adev);

		ret = amdgpu_atomfirmware_asic_init(adev, true);

		return ret;

	} else {

		return amdgpu_atom_asic_init(adev->mode_info.atom_context);

	}



	return 0;

}



/**

 * amdgpu_device_mem_scratch_init - allocate the VRAM scratch page

 *
@@ -4694,9 +4701,12 @@ int amdgpu_device_mode1_reset(struct amdgpu_device *adev) 
	}



	if (ret)

		dev_err(adev->dev, "GPU mode1 reset failed\n");

		goto mode1_reset_failed;



	amdgpu_device_load_pci_state(adev->pdev);

	ret = amdgpu_psp_wait_for_bootloader(adev);

	if (ret)

		goto mode1_reset_failed;



	/* wait for asic to come out of reset */

	for (i = 0; i < adev->usec_timeout; i++) {
@@ -4707,7 +4717,17 @@ int amdgpu_device_mode1_reset(struct amdgpu_device *adev) 
		udelay(1);

	}



	if (i >= adev->usec_timeout) {

		ret = -ETIMEDOUT;

		goto mode1_reset_failed;

	}



	amdgpu_atombios_scratch_regs_engine_hung(adev, false);



	return 0;



mode1_reset_failed:

	dev_err(adev->dev, "GPU mode1 reset failed\n");

	return ret;

}
@@ -4849,7 +4869,7 @@ static void amdgpu_reset_capture_coredumpm(struct amdgpu_device *adev) 
	struct drm_device *dev = adev_to_drm(adev);



	ktime_get_ts64(&adev->reset_time);

	dev_coredumpm(dev->dev, THIS_MODULE, adev, 0, GFP_KERNEL,

	dev_coredumpm(dev->dev, THIS_MODULE, adev, 0, GFP_NOWAIT,

		      amdgpu_devcoredump_read, amdgpu_devcoredump_free);

}

#endif