Commit 4369c93c authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Rob Clark
Browse files

drm/msm/dpu: initial support for merge3D hardware block 



Add initial support for merge3D hardware block on SM8[12]50. Merge3D is
reposible for merging contents of two LMs (two PPs) into single
interface.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent d8199c85

drivers/gpu/drm/msm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ msm-y := \ 
	disp/dpu1/dpu_hw_pingpong.o \

	disp/dpu1/dpu_hw_sspp.o \

	disp/dpu1/dpu_hw_dspp.o \

	disp/dpu1/dpu_hw_merge3d.o \

	disp/dpu1/dpu_hw_top.o \

	disp/dpu1/dpu_hw_util.o \

	disp/dpu1/dpu_hw_vbif.o \

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+39 −14
Original line number Diff line number Diff line
@@ -41,6 +41,8 @@ 
#define PINGPONG_SDM845_SPLIT_MASK \

	(PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2))



#define MERGE_3D_SM8150_MASK (0)



#define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC)



#define INTF_SDM845_MASK (0)
@@ -481,40 +483,59 @@ static const struct dpu_pingpong_sub_blks sdm845_pp_sblk = { 
		.len = 0x20, .version = 0x10000},

};



#define PP_BLK_TE(_name, _id, _base) \

#define PP_BLK_TE(_name, _id, _base, _merge_3d) \

	{\

	.name = _name, .id = _id, \

	.base = _base, .len = 0xd4, \

	.features = PINGPONG_SDM845_SPLIT_MASK, \

	.merge_3d = _merge_3d, \

	.sblk = &sdm845_pp_sblk_te \

	}

#define PP_BLK(_name, _id, _base) \

#define PP_BLK(_name, _id, _base, _merge_3d) \

	{\

	.name = _name, .id = _id, \

	.base = _base, .len = 0xd4, \

	.features = PINGPONG_SDM845_MASK, \

	.merge_3d = _merge_3d, \

	.sblk = &sdm845_pp_sblk \

	}



static const struct dpu_pingpong_cfg sdm845_pp[] = {

	PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000),

	PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800),

	PP_BLK("pingpong_2", PINGPONG_2, 0x71000),

	PP_BLK("pingpong_3", PINGPONG_3, 0x71800),

	PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0),

	PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0),

	PP_BLK("pingpong_2", PINGPONG_2, 0x71000, 0),

	PP_BLK("pingpong_3", PINGPONG_3, 0x71800, 0),

};



static struct dpu_pingpong_cfg sc7180_pp[] = {

	PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000),

	PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800),

	PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, 0),

	PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, 0),

};



static const struct dpu_pingpong_cfg sm8150_pp[] = {

	PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000),

	PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800),

	PP_BLK("pingpong_2", PINGPONG_2, 0x71000),

	PP_BLK("pingpong_3", PINGPONG_3, 0x71800),

	PP_BLK("pingpong_4", PINGPONG_4, 0x72000),

	PP_BLK("pingpong_5", PINGPONG_5, 0x72800),

	PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, MERGE_3D_0),

	PP_BLK_TE("pingpong_1", PINGPONG_1, 0x70800, MERGE_3D_0),

	PP_BLK("pingpong_2", PINGPONG_2, 0x71000, MERGE_3D_1),

	PP_BLK("pingpong_3", PINGPONG_3, 0x71800, MERGE_3D_1),

	PP_BLK("pingpong_4", PINGPONG_4, 0x72000, MERGE_3D_2),

	PP_BLK("pingpong_5", PINGPONG_5, 0x72800, MERGE_3D_2),

};



/*************************************************************

 * MERGE_3D sub blocks config

 *************************************************************/

#define MERGE_3D_BLK(_name, _id, _base) \

	{\

	.name = _name, .id = _id, \

	.base = _base, .len = 0x100, \

	.features = MERGE_3D_SM8150_MASK, \

	.sblk = NULL \

	}



static const struct dpu_merge_3d_cfg sm8150_merge_3d[] = {

	MERGE_3D_BLK("merge_3d_0", MERGE_3D_0, 0x83000),

	MERGE_3D_BLK("merge_3d_1", MERGE_3D_1, 0x83100),

	MERGE_3D_BLK("merge_3d_2", MERGE_3D_2, 0x83200),

};



/*************************************************************
@@ -838,6 +859,8 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
		.mixer = sm8150_lm,

		.pingpong_count = ARRAY_SIZE(sm8150_pp),

		.pingpong = sm8150_pp,

		.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),

		.merge_3d = sm8150_merge_3d,

		.intf_count = ARRAY_SIZE(sm8150_intf),

		.intf = sm8150_intf,

		.vbif_count = ARRAY_SIZE(sdm845_vbif),
@@ -868,6 +891,8 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
		.mixer = sm8150_lm,

		.pingpong_count = ARRAY_SIZE(sm8150_pp),

		.pingpong = sm8150_pp,

		.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),

		.merge_3d = sm8150_merge_3d,

		.intf_count = ARRAY_SIZE(sm8150_intf),

		.intf = sm8150_intf,

		.vbif_count = ARRAY_SIZE(sdm845_vbif),

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+18 −0
Original line number Diff line number Diff line
@@ -524,9 +524,23 @@ struct dpu_dspp_cfg { 
 */

struct dpu_pingpong_cfg  {

	DPU_HW_BLK_INFO;

	u32 merge_3d;

	const struct dpu_pingpong_sub_blks *sblk;

};



/**

 * struct dpu_merge_3d_cfg - information of DSPP blocks

 * @id                 enum identifying this block

 * @base               register offset of this block

 * @features           bit mask identifying sub-blocks/features

 *                     supported by this block

 * @sblk               sub-blocks information

 */

struct dpu_merge_3d_cfg  {

	DPU_HW_BLK_INFO;

	const struct dpu_merge_3d_sub_blks *sblk;

};



/**

 * struct dpu_intf_cfg - information of timing engine blocks

 * @id                 enum identifying this block
@@ -724,6 +738,9 @@ struct dpu_mdss_cfg { 
	u32 pingpong_count;

	const struct dpu_pingpong_cfg *pingpong;



	u32 merge_3d_count;

	const struct dpu_merge_3d_cfg *merge_3d;



	u32 intf_count;

	const struct dpu_intf_cfg *intf;
@@ -767,6 +784,7 @@ struct dpu_mdss_hw_cfg_handler { 
#define BLK_INTF(s) ((s)->intf)

#define BLK_AD(s) ((s)->ad)

#define BLK_DSPP(s) ((s)->dspp)

#define BLK_MERGE3d(s) ((s)->merge_3d)



/**

 * dpu_hw_catalog_init - dpu hardware catalog init API retrieves

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h

+8 −0
Original line number Diff line number Diff line
@@ -96,6 +96,7 @@ enum dpu_hw_blk_type { 
	DPU_HW_BLK_INTF,

	DPU_HW_BLK_WB,

	DPU_HW_BLK_DSPP,

	DPU_HW_BLK_MERGE_3D,

	DPU_HW_BLK_MAX,

};
@@ -186,6 +187,13 @@ enum dpu_pingpong { 
	PINGPONG_MAX

};



enum dpu_merge_3d {

	MERGE_3D_0 = 1,

	MERGE_3D_1,

	MERGE_3D_2,

	MERGE_3D_MAX

};



enum dpu_intf {

	INTF_0 = 1,

	INTF_1,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c

0 → 100644
+73 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

 */



#include <linux/iopoll.h>



#include "dpu_hw_mdss.h"

#include "dpu_hwio.h"

#include "dpu_hw_catalog.h"

#include "dpu_hw_merge3d.h"

#include "dpu_kms.h"

#include "dpu_trace.h"



static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,

		const struct dpu_mdss_cfg *m,

		void __iomem *addr,

		struct dpu_hw_blk_reg_map *b)

{

	int i;



	for (i = 0; i < m->merge_3d_count; i++) {

		if (idx == m->merge_3d[i].id) {

			b->base_off = addr;

			b->blk_off = m->merge_3d[i].base;

			b->length = m->merge_3d[i].len;

			b->hwversion = m->hwversion;

			b->log_mask = DPU_DBG_MASK_PINGPONG;

			return &m->merge_3d[i];

		}

	}



	return ERR_PTR(-EINVAL);

}



static void _setup_merge_3d_ops(struct dpu_hw_merge_3d *c,

				unsigned long features)

{

};



static struct dpu_hw_blk_ops dpu_hw_ops;



struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx,

		void __iomem *addr,

		const struct dpu_mdss_cfg *m)

{

	struct dpu_hw_merge_3d *c;

	const struct dpu_merge_3d_cfg *cfg;



	c = kzalloc(sizeof(*c), GFP_KERNEL);

	if (!c)

		return ERR_PTR(-ENOMEM);



	cfg = _merge_3d_offset(idx, m, addr, &c->hw);

	if (IS_ERR_OR_NULL(cfg)) {

		kfree(c);

		return ERR_PTR(-EINVAL);

	}



	c->idx = idx;

	c->caps = cfg;

	_setup_merge_3d_ops(c, c->caps->features);



	dpu_hw_blk_init(&c->base, DPU_HW_BLK_MERGE_3D, idx, &dpu_hw_ops);



	return c;

}



void dpu_hw_merge_3d_destroy(struct dpu_hw_merge_3d *hw)

{

	if (hw)

		dpu_hw_blk_destroy(&hw->base);

	kfree(hw);

}