Commit 4363c852 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch irq/cirq-v2 into irq/irqchip-next 



* irq/cirq-v2:
  : .
  : Support for the MTK CIRQv2, courtesy of AngeloGioacchino Del Regno:
  :
  : "On newer SoCs (like MT8192/95 and also other non-chromebook chips), the
  : MediaTek CIRQ controller has a new register layout: this series adds
  : some more flexibility to the irq-mtk-cirq driver, allowing to select
  : the register layout based on a SoC-specific compatible."
  :
  : .
  irqchip/irq-mtk-cirq: Add support for System CIRQ on MT8192
  irqchip/irq-mtk-cirq: Move register offsets to const array
  dt-bindings: interrupt-controller: mediatek,cirq: Document MT8192
  dt-bindings: interrupt-controller: mediatek,cirq: Migrate to dt schema

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents dc7f1c29 5c4e0aac

Documentation/devicetree/bindings/interrupt-controller/mediatek,cirq.txt

deleted100644 → 0
+0 −33
Original line number Diff line number Diff line 
* Mediatek 27xx cirq



In Mediatek SOCs, the CIRQ is a low power interrupt controller designed to

work outside MCUSYS which comprises with Cortex-Ax cores,CCI and GIC.

The external interrupts (outside MCUSYS) will feed through CIRQ and connect

to GIC in MCUSYS. When CIRQ is enabled, it will record the edge-sensitive

interrupts and generate a pulse signal to parent interrupt controller when

flush command is executed. With CIRQ, MCUSYS can be completely turned off

to improve the system power consumption without losing interrupts.



Required properties:

- compatible: should be one of

  - "mediatek,mt2701-cirq" for mt2701 CIRQ

  - "mediatek,mt8135-cirq" for mt8135 CIRQ

  - "mediatek,mt8173-cirq" for mt8173 CIRQ

  and "mediatek,cirq" as a fallback.

- interrupt-controller : Identifies the node as an interrupt controller.

- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.

- reg: Physical base address of the cirq registers and length of memory

  mapped region.

- mediatek,ext-irq-range: Identifies external irq number range in different

  SOCs.



Example:

	cirq: interrupt-controller@10204000 {

		compatible = "mediatek,mt2701-cirq",

			     "mediatek,mtk-cirq";

		interrupt-controller;

		#interrupt-cells = <3>;

		interrupt-parent = <&sysirq>;

		reg = <0 0x10204000 0 0x400>;

		mediatek,ext-irq-start = <32 200>;

	};

Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml

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+68 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/mediatek,mtk-cirq.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MediaTek System Interrupt Controller



maintainers:

  - Youlin Pei <youlin.pei@mediatek.com>



description:

  In MediaTek SoCs, the CIRQ is a low power interrupt controller designed to

  work outside of MCUSYS which comprises with Cortex-Ax cores, CCI and GIC.

  The external interrupts (outside MCUSYS) will feed through CIRQ and connect

  to GIC in MCUSYS. When CIRQ is enabled, it will record the edge-sensitive

  interrupts and generate a pulse signal to parent interrupt controller when

  flush command is executed. With CIRQ, MCUSYS can be completely turned off

  to improve the system power consumption without losing interrupts.





properties:

  compatible:

    items:

      - enum:

          - mediatek,mt2701-cirq

          - mediatek,mt8135-cirq

          - mediatek,mt8173-cirq

          - mediatek,mt8192-cirq

      - const: mediatek,mtk-cirq



  reg:

    maxItems: 1



  '#interrupt-cells':

    const: 3



  interrupt-controller: true



  mediatek,ext-irq-range:

    $ref: /schemas/types.yaml#/definitions/uint32-array

    items:

      - description: First CIRQ interrupt

      - description: Last CIRQ interrupt

    description:

      Identifies the range of external interrupts in different SoCs



required:

  - compatible

  - reg

  - '#interrupt-cells'

  - interrupt-controller

  - mediatek,ext-irq-range



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>



    cirq: interrupt-controller@10204000 {

        compatible = "mediatek,mt2701-cirq", "mediatek,mtk-cirq";

        reg = <0x10204000 0x400>;

        #interrupt-cells = <3>;

        interrupt-controller;

        interrupt-parent = <&sysirq>;

        mediatek,ext-irq-range = <32 200>;

    };

drivers/irqchip/irq-mtk-cirq.c

+78 −17
Original line number Diff line number Diff line
@@ -15,14 +15,41 @@ 
#include <linux/slab.h>

#include <linux/syscore_ops.h>



#define CIRQ_ACK	0x40

#define CIRQ_MASK_SET	0xc0

#define CIRQ_MASK_CLR	0x100

#define CIRQ_SENS_SET	0x180

#define CIRQ_SENS_CLR	0x1c0

#define CIRQ_POL_SET	0x240

#define CIRQ_POL_CLR	0x280

#define CIRQ_CONTROL	0x300

enum mtk_cirq_regoffs_index {

	CIRQ_STA,

	CIRQ_ACK,

	CIRQ_MASK_SET,

	CIRQ_MASK_CLR,

	CIRQ_SENS_SET,

	CIRQ_SENS_CLR,

	CIRQ_POL_SET,

	CIRQ_POL_CLR,

	CIRQ_CONTROL

};



static const u32 mtk_cirq_regoffs_v1[] = {

	[CIRQ_STA]	= 0x0,

	[CIRQ_ACK]	= 0x40,

	[CIRQ_MASK_SET]	= 0xc0,

	[CIRQ_MASK_CLR]	= 0x100,

	[CIRQ_SENS_SET]	= 0x180,

	[CIRQ_SENS_CLR]	= 0x1c0,

	[CIRQ_POL_SET]	= 0x240,

	[CIRQ_POL_CLR]	= 0x280,

	[CIRQ_CONTROL]	= 0x300,

};



static const u32 mtk_cirq_regoffs_v2[] = {

	[CIRQ_STA]	= 0x0,

	[CIRQ_ACK]	= 0x80,

	[CIRQ_MASK_SET]	= 0x180,

	[CIRQ_MASK_CLR]	= 0x200,

	[CIRQ_SENS_SET]	= 0x300,

	[CIRQ_SENS_CLR]	= 0x380,

	[CIRQ_POL_SET]	= 0x480,

	[CIRQ_POL_CLR]	= 0x500,

	[CIRQ_CONTROL]	= 0x600,

};



#define CIRQ_EN	0x1

#define CIRQ_EDGE	0x2
@@ -32,18 +59,32 @@ struct mtk_cirq_chip_data { 
	void __iomem *base;

	unsigned int ext_irq_start;

	unsigned int ext_irq_end;

	const u32 *offsets;

	struct irq_domain *domain;

};



static struct mtk_cirq_chip_data *cirq_data;



static void mtk_cirq_write_mask(struct irq_data *data, unsigned int offset)

static void __iomem *mtk_cirq_reg(struct mtk_cirq_chip_data *chip_data,

				  enum mtk_cirq_regoffs_index idx)

{

	return chip_data->base + chip_data->offsets[idx];

}



static void __iomem *mtk_cirq_irq_reg(struct mtk_cirq_chip_data *chip_data,

				      enum mtk_cirq_regoffs_index idx,

				      unsigned int cirq_num)

{

	return mtk_cirq_reg(chip_data, idx) + (cirq_num / 32) * 4;

}



static void mtk_cirq_write_mask(struct irq_data *data, enum mtk_cirq_regoffs_index idx)

{

	struct mtk_cirq_chip_data *chip_data = data->chip_data;

	unsigned int cirq_num = data->hwirq;

	u32 mask = 1 << (cirq_num % 32);



	writel_relaxed(mask, chip_data->base + offset + (cirq_num / 32) * 4);

	writel_relaxed(mask, mtk_cirq_irq_reg(chip_data, idx, cirq_num));

}



static void mtk_cirq_mask(struct irq_data *data)
@@ -160,6 +201,7 @@ static const struct irq_domain_ops cirq_domain_ops = { 
#ifdef CONFIG_PM_SLEEP

static int mtk_cirq_suspend(void)

{

	void __iomem *reg;

	u32 value, mask;

	unsigned int irq, hwirq_num;

	bool pending, masked;
@@ -200,31 +242,34 @@ static int mtk_cirq_suspend(void) 
				continue;

		}



		reg = mtk_cirq_irq_reg(cirq_data, CIRQ_ACK, i);

		mask = 1 << (i % 32);

		writel_relaxed(mask, cirq_data->base + CIRQ_ACK + (i / 32) * 4);

		writel_relaxed(mask, reg);

	}



	/* set edge_only mode, record edge-triggerd interrupts */

	/* enable cirq */

	value = readl_relaxed(cirq_data->base + CIRQ_CONTROL);

	reg = mtk_cirq_reg(cirq_data, CIRQ_CONTROL);

	value = readl_relaxed(reg);

	value |= (CIRQ_EDGE | CIRQ_EN);

	writel_relaxed(value, cirq_data->base + CIRQ_CONTROL);

	writel_relaxed(value, reg);



	return 0;

}



static void mtk_cirq_resume(void)

{

	void __iomem *reg = mtk_cirq_reg(cirq_data, CIRQ_CONTROL);

	u32 value;



	/* flush recorded interrupts, will send signals to parent controller */

	value = readl_relaxed(cirq_data->base + CIRQ_CONTROL);

	writel_relaxed(value | CIRQ_FLUSH, cirq_data->base + CIRQ_CONTROL);

	value = readl_relaxed(reg);

	writel_relaxed(value | CIRQ_FLUSH, reg);



	/* disable cirq */

	value = readl_relaxed(cirq_data->base + CIRQ_CONTROL);

	value = readl_relaxed(reg);

	value &= ~(CIRQ_EDGE | CIRQ_EN);

	writel_relaxed(value, cirq_data->base + CIRQ_CONTROL);

	writel_relaxed(value, reg);

}



static struct syscore_ops mtk_cirq_syscore_ops = {
@@ -240,10 +285,19 @@ static void mtk_cirq_syscore_init(void) 
static inline void mtk_cirq_syscore_init(void) {}

#endif



static const struct of_device_id mtk_cirq_of_match[] = {

	{ .compatible = "mediatek,mt2701-cirq", .data = &mtk_cirq_regoffs_v1 },

	{ .compatible = "mediatek,mt8135-cirq", .data = &mtk_cirq_regoffs_v1 },

	{ .compatible = "mediatek,mt8173-cirq", .data = &mtk_cirq_regoffs_v1 },

	{ .compatible = "mediatek,mt8192-cirq", .data = &mtk_cirq_regoffs_v2 },

	{ /* sentinel */ }

};



static int __init mtk_cirq_of_init(struct device_node *node,

				   struct device_node *parent)

{

	struct irq_domain *domain, *domain_parent;

	const struct of_device_id *match;

	unsigned int irq_num;

	int ret;
@@ -274,6 +328,13 @@ static int __init mtk_cirq_of_init(struct device_node *node, 
	if (ret)

		goto out_unmap;



	match = of_match_node(mtk_cirq_of_match, node);

	if (!match) {

		ret = -ENODEV;

		goto out_unmap;

	}

	cirq_data->offsets = match->data;



	irq_num = cirq_data->ext_irq_end - cirq_data->ext_irq_start + 1;

	domain = irq_domain_add_hierarchy(domain_parent, 0,

					  irq_num, node,