Commit 4356497e authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
Browse files

pinctrl: renesas: r8a7796: Add QSPI[01] pins, groups and functions 



Add pins, groups and functions for QSPIO[01].

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201119130926.25692-4-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 590567bf

drivers/pinctrl/renesas/pfc-r8a7796.c

+73 −2
Original line number Diff line number Diff line
@@ -3257,6 +3257,57 @@ static const unsigned int pwm6_b_mux[] = { 
	PWM6_B_MARK,

};



/* - QSPI0 ------------------------------------------------------------------ */

static const unsigned int qspi0_ctrl_pins[] = {

	/* QSPI0_SPCLK, QSPI0_SSL */

	PIN_QSPI0_SPCLK, PIN_QSPI0_SSL,

};

static const unsigned int qspi0_ctrl_mux[] = {

	QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,

};

static const unsigned int qspi0_data2_pins[] = {

	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */

	PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,

};

static const unsigned int qspi0_data2_mux[] = {

	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,

};

static const unsigned int qspi0_data4_pins[] = {

	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */

	PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,

	/* QSPI0_IO2, QSPI0_IO3 */

	PIN_QSPI0_IO2, PIN_QSPI0_IO3,

};

static const unsigned int qspi0_data4_mux[] = {

	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,

	QSPI0_IO2_MARK, QSPI0_IO3_MARK,

};

/* - QSPI1 ------------------------------------------------------------------ */

static const unsigned int qspi1_ctrl_pins[] = {

	/* QSPI1_SPCLK, QSPI1_SSL */

	PIN_QSPI1_SPCLK, PIN_QSPI1_SSL,

};

static const unsigned int qspi1_ctrl_mux[] = {

	QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,

};

static const unsigned int qspi1_data2_pins[] = {

	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */

	PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,

};

static const unsigned int qspi1_data2_mux[] = {

	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,

};

static const unsigned int qspi1_data4_pins[] = {

	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */

	PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,

	/* QSPI1_IO2, QSPI1_IO3 */

	PIN_QSPI1_IO2, PIN_QSPI1_IO3,

};

static const unsigned int qspi1_data4_mux[] = {

	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,

	QSPI1_IO2_MARK, QSPI1_IO3_MARK,

};



/* - SCIF0 ------------------------------------------------------------------ */

static const unsigned int scif0_data_pins[] = {

	/* RX, TX */
@@ -4134,7 +4185,7 @@ static const unsigned int vin5_clk_mux[] = { 
};



static const struct {

	struct sh_pfc_pin_group common[316];

	struct sh_pfc_pin_group common[322];

#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)

	struct sh_pfc_pin_group automotive[30];

#endif
@@ -4339,6 +4390,12 @@ static const struct { 
		SH_PFC_PIN_GROUP(pwm5_b),

		SH_PFC_PIN_GROUP(pwm6_a),

		SH_PFC_PIN_GROUP(pwm6_b),

		SH_PFC_PIN_GROUP(qspi0_ctrl),

		SH_PFC_PIN_GROUP(qspi0_data2),

		SH_PFC_PIN_GROUP(qspi0_data4),

		SH_PFC_PIN_GROUP(qspi1_ctrl),

		SH_PFC_PIN_GROUP(qspi1_data2),

		SH_PFC_PIN_GROUP(qspi1_data4),

		SH_PFC_PIN_GROUP(scif0_data),

		SH_PFC_PIN_GROUP(scif0_clk),

		SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -4829,6 +4886,18 @@ static const char * const pwm6_groups[] = { 
	"pwm6_b",

};



static const char * const qspi0_groups[] = {

	"qspi0_ctrl",

	"qspi0_data2",

	"qspi0_data4",

};



static const char * const qspi1_groups[] = {

	"qspi1_ctrl",

	"qspi1_data2",

	"qspi1_data4",

};



static const char * const scif0_groups[] = {

	"scif0_data",

	"scif0_clk",
@@ -5004,7 +5073,7 @@ static const char * const vin5_groups[] = { 
};



static const struct {

	struct sh_pfc_function common[50];

	struct sh_pfc_function common[52];

#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)

	struct sh_pfc_function automotive[4];

#endif
@@ -5041,6 +5110,8 @@ static const struct { 
		SH_PFC_FUNCTION(pwm4),

		SH_PFC_FUNCTION(pwm5),

		SH_PFC_FUNCTION(pwm6),

		SH_PFC_FUNCTION(qspi0),

		SH_PFC_FUNCTION(qspi1),

		SH_PFC_FUNCTION(scif0),

		SH_PFC_FUNCTION(scif1),

		SH_PFC_FUNCTION(scif2),