Merge branch 'pci/kernel-doc' (4343292f) · Commits · EulixOS / Software / Kernel

drivers/pci/controller/cadence/pcie-cadence.h

+5 −2

Original line number	Diff line number	Diff line
		@@ -263,9 +263,12 @@ struct cdns_pcie_ops {
		* struct cdns_pcie - private data for Cadence PCIe controller drivers
		* @reg_base: IO mapped register base
		* @mem_res: start/end offsets in the physical system memory to map PCI accesses
		* @dev: PCIe controller
		* @is_rc: tell whether the PCIe controller mode is Root Complex or Endpoint.
		* @bus: In Root Complex mode, the bus number
		* @ops: Platform specific ops to control various inputs from Cadence PCIe
		* @phy_count: number of supported PHY devices
		* @phy: list of pointers to specific PHY control blocks
		* @link: list of pointers to corresponding device link representations
		* @ops: Platform-specific ops to control various inputs from Cadence PCIe
		* wrapper
		*/
		struct cdns_pcie {

drivers/pci/controller/pci-xgene.c

+1 −1

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0+
		/**
		/*
		* APM X-Gene PCIe Driver
		*
		* Copyright (c) 2014 Applied Micro Circuits Corporation.

drivers/pci/controller/pcie-iproc-msi.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -49,7 +49,7 @@ enum iproc_msi_reg {
		struct iproc_msi;

		/**
		* iProc MSI group
		* struct iproc_msi_grp - iProc MSI group
		*
		* One MSI group is allocated per GIC interrupt, serviced by one iProc MSI
		* event queue.
		@@ -65,7 +65,7 @@ struct iproc_msi_grp {
		};

		/**
		* iProc event queue based MSI
		* struct iproc_msi - iProc event queue based MSI
		*
		* Only meant to be used on platforms without MSI support integrated into the
		* GIC.

drivers/pci/controller/pcie-iproc.c

+11 −13

Original line number	Diff line number	Diff line
		@@ -89,8 +89,8 @@
		#define IPROC_PCIE_REG_INVALID 0xffff

		/**
		* iProc PCIe outbound mapping controller specific parameters
		*
		* struct iproc_pcie_ob_map - iProc PCIe outbound mapping controller-specific
		* parameters
		* @window_sizes: list of supported outbound mapping window sizes in MB
		* @nr_sizes: number of supported outbound mapping window sizes
		*/
		@@ -136,22 +136,20 @@ static const struct iproc_pcie_ob_map paxb_v2_ob_map[] = {
		};

		/**
		* iProc PCIe inbound mapping type
		* enum iproc_pcie_ib_map_type - iProc PCIe inbound mapping type
		* @IPROC_PCIE_IB_MAP_MEM: DDR memory
		* @IPROC_PCIE_IB_MAP_IO: device I/O memory
		* @IPROC_PCIE_IB_MAP_INVALID: invalid or unused
		*/
		enum iproc_pcie_ib_map_type {
		/* for DDR memory */
		IPROC_PCIE_IB_MAP_MEM = 0,

		/* for device I/O memory */
		IPROC_PCIE_IB_MAP_IO,

		/* invalid or unused */
		IPROC_PCIE_IB_MAP_INVALID
		};

		/**
		* iProc PCIe inbound mapping controller specific parameters
		*
		* struct iproc_pcie_ib_map - iProc PCIe inbound mapping controller-specific
		* parameters
		* @type: inbound mapping region type
		* @size_unit: inbound mapping region size unit, could be SZ_1K, SZ_1M, or
		* SZ_1G
		@@ -437,7 +435,7 @@ static inline void iproc_pcie_write_reg(struct iproc_pcie *pcie,
		writel(val, pcie->base + offset);
		}

		/**
		/*
		* APB error forwarding can be disabled during access of configuration
		* registers of the endpoint device, to prevent unsupported requests
		* (typically seen during enumeration with multi-function devices) from
		@@ -619,7 +617,7 @@ static int iproc_pcie_config_read(struct pci_bus *bus, unsigned int devfn,
		return PCIBIOS_SUCCESSFUL;
		}

		/**
		/*
		* Note access to the configuration registers are protected at the higher layer
		* by 'pci_lock' in drivers/pci/access.c
		*/
		@@ -897,7 +895,7 @@ static inline int iproc_pcie_ob_write(struct iproc_pcie *pcie, int window_idx,
		return 0;
		}

		/**
		/*
		* Some iProc SoCs require the SW to configure the outbound address mapping
		*
		* Outbound address translation:

drivers/pci/controller/pcie-iproc.h

+11 −5

Original line number	Diff line number	Diff line
		@@ -7,7 +7,13 @@
		#define _PCIE_IPROC_H

		/**
		* iProc PCIe interface type
		* enum iproc_pcie_type - iProc PCIe interface type
		* @IPROC_PCIE_PAXB_BCMA: BCMA-based host controllers
		* @IPROC_PCIE_PAXB: PAXB-based host controllers for
		* NS, NSP, Cygnus, NS2, and Pegasus SOCs
		* @IPROC_PCIE_PAXB_V2: PAXB-based host controllers for Stingray SoCs
		* @IPROC_PCIE_PAXC: PAXC-based host controllers
		* @IPROC_PCIE_PAXC_V2: PAXC-based host controllers (second generation)
		*
		* PAXB is the wrapper used in root complex that can be connected to an
		* external endpoint device.
		@@ -24,7 +30,7 @@ enum iproc_pcie_type {
		};

		/**
		* iProc PCIe outbound mapping
		* struct iproc_pcie_ob - iProc PCIe outbound mapping
		* @axi_offset: offset from the AXI address to the internal address used by
		* the iProc PCIe core
		* @nr_windows: total number of supported outbound mapping windows
		@@ -35,7 +41,7 @@ struct iproc_pcie_ob {
		};

		/**
		* iProc PCIe inbound mapping
		* struct iproc_pcie_ib - iProc PCIe inbound mapping
		* @nr_regions: total number of supported inbound mapping regions
		*/
		struct iproc_pcie_ib {
		@@ -47,13 +53,13 @@ struct iproc_pcie_ib_map;
		struct iproc_msi;

		/**
		* iProc PCIe device
		*
		* struct iproc_pcie - iProc PCIe device
		* @dev: pointer to device data structure
		* @type: iProc PCIe interface type
		* @reg_offsets: register offsets
		* @base: PCIe host controller I/O register base
		* @base_addr: PCIe host controller register base physical address
		* @mem: host bridge memory window resource
		* @phy: optional PHY device that controls the Serdes
		* @map_irq: function callback to map interrupts
		* @ep_is_internal: indicates an internal emulated endpoint device is connected