Commit 433e5dec authored by Anson Jacob's avatar Anson Jacob Committed by Alex Deucher
Browse files

drm/amd/display: Add comment where CONFIG_DRM_AMD_DC_DCN macro ends 



Trivial patch which adds a comment for macro
endif's in amdgpu_dm.c

Reviewed-by: default avatarAriel Bernstein <Eric.Bernstein@amd.com>
Reviewed-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Acked-by: default avatarAnson Jacob <Anson.Jacob@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAnson Jacob <Anson.Jacob@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a44fe9ee

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+4 −4
Original line number Diff line number Diff line
@@ -619,7 +619,7 @@ static void dm_dcn_vertical_interrupt0_high_irq(void *interrupt_params) 


	amdgpu_dm_crtc_handle_crc_window_irq(&acrtc->base);

}

#endif

#endif /* CONFIG_DRM_AMD_SECURE_DISPLAY */



/**

 * dmub_aux_setconfig_reply_callback - Callback for AUX or SET_CONFIG command.
@@ -813,7 +813,7 @@ static void dm_dmub_outbox1_low_irq(void *interrupt_params) 
	if (count > DMUB_TRACE_MAX_READ)

		DRM_DEBUG_DRIVER("Warning : count > DMUB_TRACE_MAX_READ");

}

#endif

#endif /* CONFIG_DRM_AMD_DC_DCN */



static int dm_set_clockgating_state(void *handle,

		  enum amd_clockgating_state state)
@@ -1564,7 +1564,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) 
			DRM_ERROR("amdgpu: fail to register dmub hpd callback");

			goto error;

		}

#endif

#endif /* CONFIG_DRM_AMD_DC_DCN */

	}



	if (amdgpu_dm_initialize_drm_device(adev)) {
@@ -6078,7 +6078,7 @@ static void apply_dsc_policy_for_stream(struct amdgpu_dm_connector *aconnector, 
	if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_bits_per_pixel)

		stream->timing.dsc_cfg.bits_per_pixel = aconnector->dsc_settings.dsc_bits_per_pixel;

}

#endif

#endif /* CONFIG_DRM_AMD_DC_DCN */



/**

 * DOC: FreeSync Video

drivers/gpu/drm/amd/display/dc/core/dc.c

+4 −2
Original line number Diff line number Diff line
@@ -1892,6 +1892,7 @@ static bool is_flip_pending_in_pipes(struct dc *dc, struct dc_state *context) 
	return false;

}



#ifdef CONFIG_DRM_AMD_DC_DCN

/* Perform updates here which need to be deferred until next vupdate

 *

 * i.e. blnd lut, 3dlut, and shaper lut bypass regs are double buffered
@@ -1901,7 +1902,6 @@ static bool is_flip_pending_in_pipes(struct dc *dc, struct dc_state *context) 
 */

static void process_deferred_updates(struct dc *dc)

{

#ifdef CONFIG_DRM_AMD_DC_DCN

	int i = 0;



	if (dc->debug.enable_mem_low_power.bits.cm) {
@@ -1910,8 +1910,8 @@ static void process_deferred_updates(struct dc *dc) 
			if (dc->res_pool->dpps[i]->funcs->dpp_deferred_update)

				dc->res_pool->dpps[i]->funcs->dpp_deferred_update(dc->res_pool->dpps[i]);

	}

#endif

}

#endif /* CONFIG_DRM_AMD_DC_DCN */



void dc_post_update_surfaces_to_stream(struct dc *dc)

{
@@ -1938,7 +1938,9 @@ void dc_post_update_surfaces_to_stream(struct dc *dc) 
			dc->hwss.disable_plane(dc, &context->res_ctx.pipe_ctx[i]);

		}



#ifdef CONFIG_DRM_AMD_DC_DCN

	process_deferred_updates(dc);

#endif



	dc->hwss.optimize_bandwidth(dc, context);

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+1 −1
Original line number Diff line number Diff line
@@ -4770,7 +4770,7 @@ uint32_t dc_bandwidth_in_kbps_from_timing( 
				timing->dsc_cfg.bits_per_pixel,

				timing->dsc_cfg.num_slices_h,

				timing->dsc_cfg.is_dp);

#endif

#endif /* CONFIG_DRM_AMD_DC_DCN */



	switch (timing->display_color_depth) {

	case COLOR_DEPTH_666: