Commit 430aa33a authored by Johan Hovold's avatar Johan Hovold Committed by Alexandre Belloni
Browse files

dt-bindings: rtc: qcom-pm8xxx: add nvmem-cell offset 



On many Qualcomm platforms the PMIC RTC control and time registers are
read-only so that the RTC time can not be updated. Instead an offset
needs be stored in some machine-specific non-volatile memory, which a
driver can take into account.

Add an 'offset' nvmem cell which can be used to store a 32-bit offset
from the Unix epoch so that the RTC time can be updated on such
platforms.

Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarJohan Hovold <johan+linaro@kernel.org>
Reviewed-by: default avatarDavid Collins <quic_collinsd@quicinc.com>
Link: https://lore.kernel.org/r/20230202155448.6715-17-johan+linaro@kernel.org


Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent c978414b

Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml

+12 −0
Original line number Diff line number Diff line
@@ -40,6 +40,16 @@ properties: 
    description:

      Indicates that the setting of RTC time is allowed by the host CPU.



  nvmem-cells:

    items:

      - description:

          four-byte nvmem cell holding a little-endian offset from the Unix

          epoch representing the time when the RTC timer was last reset



  nvmem-cell-names:

    items:

      - const: offset



  wakeup-source: true



required:
@@ -69,6 +79,8 @@ examples: 
          compatible = "qcom,pm8921-rtc";

          reg = <0x11d>;

          interrupts = <0x27 0>;

          nvmem-cells = <&rtc_offset>;

          nvmem-cell-names = "offset";

        };

      };

    };