Commit 42831cd7 authored by Tiezhu Yang's avatar Tiezhu Yang Committed by Thomas Bogendoerfer
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MIPS: Loongson64: Set IPI_Enable register per core by itself 



In the current code, for example, core 1 sets Core[0, 1, 2, 3]_IPI_Enalbe
register and core 2, 3 do the same thing on the 1-way Loongson64 platform,
this is not necessary. Set IPI_Enable register per core by itself to avoid
duplicate operations and make the logic more clear.

Signed-off-by: default avatarTiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent fe9863a1

arch/mips/loongson64/smp.c

+2 −2
Original line number Diff line number Diff line
@@ -348,8 +348,7 @@ static void loongson3_init_secondary(void) 
	/* Set interrupt mask, but don't enable */

	change_c0_status(ST0_IM, imask);



	for (i = 0; i < num_possible_cpus(); i++)

		loongson3_ipi_write32(0xffffffff, ipi_en0_regs[cpu_logical_map(i)]);

	loongson3_ipi_write32(0xffffffff, ipi_en0_regs[cpu_logical_map(cpu)]);



	per_cpu(cpu_state, cpu) = CPU_ONLINE;

	cpu_set_core(&cpu_data[cpu],
@@ -420,6 +419,7 @@ static void __init loongson3_smp_setup(void) 
	ipi_status0_regs_init();

	ipi_en0_regs_init();

	ipi_mailbox_buf_init();

	loongson3_ipi_write32(0xffffffff, ipi_en0_regs[cpu_logical_map(0)]);

	cpu_set_core(&cpu_data[0],

		     cpu_logical_map(0) % loongson_sysconf.cores_per_package);

	cpu_data[0].package = cpu_logical_map(0) / loongson_sysconf.cores_per_package;