dt-bindings: memory: lpddr2-timings: convert to dtschema

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-timings.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: LPDDR2 SDRAM AC timing parameters for a given speed-bin

maintainers:

  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

properties:

  compatible:

    const: jedec,lpddr2-timings

  max-freq:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Maximum DDR clock frequency for the speed-bin, in Hz.

  min-freq:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Minimum DDR clock frequency for the speed-bin, in Hz.

  tCKESR:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      CKE minimum pulse width during SELF REFRESH (low pulse width during

      SELF REFRESH) in pico seconds.

  tDQSCK-max:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      DQS output data access time from CK_t/CK_c in pico seconds.

  tDQSCK-max-derated:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      DQS output data access time from CK_t/CK_c, temperature de-rated, in pico

      seconds.

  tFAW:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Four-bank activate window in pico seconds.

  tRAS-max-ns:

    description: |

      Row active time in nano seconds.

  tRAS-min:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Row active time in pico seconds.

  tRCD:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      RAS-to-CAS delay in pico seconds.

  tRPab:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Row precharge time (all banks) in pico seconds.

  tRRD:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Active bank A to active bank B in pico seconds.

  tRTP:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Internal READ to PRECHARGE command delay in pico seconds.

  tWR:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      WRITE recovery time in pico seconds.

  tWTR:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Internal WRITE-to-READ command delay in pico seconds.

  tXP:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Exit power-down to next valid command delay in pico seconds.

  tZQCL:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Long calibration time in pico seconds.

  tZQCS:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Short calibration time in pico seconds.

  tZQinit:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: |

      Initialization calibration time in pico seconds.

required:

  - compatible

  - min-freq

  - max-freq

additionalProperties: false

examples:

  - |

    timings {

        compatible = "jedec,lpddr2-timings";

        min-freq = <10000000>;

        max-freq = <400000000>;

        tCKESR = <15000>;

        tDQSCK-max = <5500>;

        tFAW = <50000>;

        tRAS-max-ns = <70000>;

        tRAS-min = <42000>;

        tRPab = <21000>;

        tRCD = <18000>;

        tRRD = <10000>;

        tRTP = <7500>;

        tWR = <15000>;

        tWTR = <7500>;

        tXP = <7500>;

        tZQCL = <360000>;

        tZQCS = <90000>;

        tZQinit = <1000000>;

    };

patternProperties:

  "^lpddr2-timings":

    type: object

    $ref: jedec,lpddr2-timings.yaml

    description: |

      The lpddr2 node may have one or more child nodes of type "lpddr2-timings".

      "lpddr2-timings" provides AC timing parameters of the device for

      a given speed-bin. The user may provide the timings for as many

      speed-bins as is required. Please see Documentation/devicetree/

      bindings/memory-controllers/ddr/lpddr2-timings.txt for more information

      on "lpddr2-timings".

      speed-bins as is required.

required:

  - compatible

* AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin

Required properties:

- compatible : Should be "jedec,lpddr2-timings"

- min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>

- max-freq : maximum DDR clock frequency for the speed-bin. Type is <u32>

Optional properties:

The following properties represent AC timing parameters from the memory

data-sheet of the device for a given speed-bin. All these properties are

of type <u32> and the default unit is ps (pico seconds). Parameters with

a different unit have a suffix indicating the unit such as 'tRAS-max-ns'

- tRCD

- tWR

- tRAS-min

- tRRD

- tWTR

- tXP

- tRTP

- tDQSCK-max

- tFAW

- tZQCS

- tZQinit

- tRPab

- tZQCL

- tCKESR

- tRAS-max-ns

- tDQSCK-max-derated

Example:

timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {

	compatible	= "jedec,lpddr2-timings";

	min-freq	= <10000000>;

	max-freq	= <400000000>;

	tRPab		= <21000>;

	tRCD		= <18000>;

	tWR		= <15000>;

	tRAS-min	= <42000>;

	tRRD		= <10000>;

	tWTR		= <7500>;

	tXP		= <7500>;

	tRTP		= <7500>;

	tCKESR		= <15000>;

	tDQSCK-max	= <5500>;

	tFAW		= <50000>;

	tZQCS		= <90000>;

	tZQCL		= <360000>;

	tZQinit		= <1000000>;

	tRAS-max-ns	= <70000>;

};