Commit 4211bfce authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Greg Kroah-Hartman
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coresight: etm4x: Expose trcdevarch via sysfs

Expose the TRCDEVARCH register via the sysfs for component
detection. Given that the TRCIDR1 may not completely identify
the ETM component and instead need to use TRCDEVARCH, expose
this via sysfs for tools to use it for identification.

Link: https://lore.kernel.org/r/20210110224850.1880240-21-suzuki.poulose@arm.com


Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-23-mathieu.poirier@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 8b94db1e
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+8 −0
Original line number Diff line number Diff line
@@ -371,6 +371,14 @@ Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description:	(Read) Print the content of the Device ID Register
		(0xFC8).  The value is taken directly from the HW.

What:		/sys/bus/coresight/devices/etm<N>/mgmt/trcdevarch
Date:		January 2021
KernelVersion:	5.12
Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
Description:	(Read) Print the content of the Device Architecture Register
		(offset 0xFBC).  The value is taken directly read
		from the HW.

What:		/sys/bus/coresight/devices/etm<N>/mgmt/trcdevtype
Date:		April 2015
KernelVersion:	4.01
+1 −0
Original line number Diff line number Diff line
@@ -2442,6 +2442,7 @@ static struct attribute *coresight_etmv4_mgmt_attrs[] = {
	coresight_etm4x_reg(trcoslsr, TRCOSLSR),
	coresight_etm4x_reg(trcconfig, TRCCONFIGR),
	coresight_etm4x_reg(trctraceid, TRCTRACEIDR),
	coresight_etm4x_reg(trcdevarch, TRCDEVARCH),
	NULL,
};