Loading drivers/net/phy/dp83tc811.c +26 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,7 @@ #define MII_DP83811_SGMII_CTRL 0x09 #define MII_DP83811_INT_STAT1 0x12 #define MII_DP83811_INT_STAT2 0x13 #define MII_DP83811_INT_STAT3 0x18 #define MII_DP83811_RESET_CTRL 0x1f #define DP83811_HW_RESET BIT(15) Loading @@ -44,6 +45,11 @@ #define DP83811_OVERVOLTAGE_INT_EN BIT(6) #define DP83811_UNDERVOLTAGE_INT_EN BIT(7) /* INT_STAT3 bits */ #define DP83811_LPS_INT_EN BIT(0) #define DP83811_NO_FRAME_INT_EN BIT(3) #define DP83811_POR_DONE_INT_EN BIT(4) #define MII_DP83811_RXSOP1 0x04a5 #define MII_DP83811_RXSOP2 0x04a6 #define MII_DP83811_RXSOP3 0x04a7 Loading Loading @@ -81,6 +87,10 @@ static int dp83811_ack_interrupt(struct phy_device *phydev) if (err < 0) return err; err = phy_read(phydev, MII_DP83811_INT_STAT3); if (err < 0) return err; return 0; } Loading Loading @@ -216,6 +226,18 @@ static int dp83811_config_intr(struct phy_device *phydev) DP83811_UNDERVOLTAGE_INT_EN); err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status); if (err < 0) return err; misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); if (misr_status < 0) return misr_status; misr_status |= (DP83811_LPS_INT_EN | DP83811_NO_FRAME_INT_EN | DP83811_POR_DONE_INT_EN); err = phy_write(phydev, MII_DP83811_INT_STAT3, misr_status); } else { err = phy_write(phydev, MII_DP83811_INT_STAT1, 0); Loading @@ -223,6 +245,10 @@ static int dp83811_config_intr(struct phy_device *phydev) return err; err = phy_write(phydev, MII_DP83811_INT_STAT2, 0); if (err < 0) return err; err = phy_write(phydev, MII_DP83811_INT_STAT3, 0); } return err; Loading Loading
drivers/net/phy/dp83tc811.c +26 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,7 @@ #define MII_DP83811_SGMII_CTRL 0x09 #define MII_DP83811_INT_STAT1 0x12 #define MII_DP83811_INT_STAT2 0x13 #define MII_DP83811_INT_STAT3 0x18 #define MII_DP83811_RESET_CTRL 0x1f #define DP83811_HW_RESET BIT(15) Loading @@ -44,6 +45,11 @@ #define DP83811_OVERVOLTAGE_INT_EN BIT(6) #define DP83811_UNDERVOLTAGE_INT_EN BIT(7) /* INT_STAT3 bits */ #define DP83811_LPS_INT_EN BIT(0) #define DP83811_NO_FRAME_INT_EN BIT(3) #define DP83811_POR_DONE_INT_EN BIT(4) #define MII_DP83811_RXSOP1 0x04a5 #define MII_DP83811_RXSOP2 0x04a6 #define MII_DP83811_RXSOP3 0x04a7 Loading Loading @@ -81,6 +87,10 @@ static int dp83811_ack_interrupt(struct phy_device *phydev) if (err < 0) return err; err = phy_read(phydev, MII_DP83811_INT_STAT3); if (err < 0) return err; return 0; } Loading Loading @@ -216,6 +226,18 @@ static int dp83811_config_intr(struct phy_device *phydev) DP83811_UNDERVOLTAGE_INT_EN); err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status); if (err < 0) return err; misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); if (misr_status < 0) return misr_status; misr_status |= (DP83811_LPS_INT_EN | DP83811_NO_FRAME_INT_EN | DP83811_POR_DONE_INT_EN); err = phy_write(phydev, MII_DP83811_INT_STAT3, misr_status); } else { err = phy_write(phydev, MII_DP83811_INT_STAT1, 0); Loading @@ -223,6 +245,10 @@ static int dp83811_config_intr(struct phy_device *phydev) return err; err = phy_write(phydev, MII_DP83811_INT_STAT2, 0); if (err < 0) return err; err = phy_write(phydev, MII_DP83811_INT_STAT3, 0); } return err; Loading