Commit 41ed4005 authored by Sean Paul's avatar Sean Paul Committed by Jani Nikula
Browse files

drm/i915/dp_link_training: Convert DRM_DEBUG_KMS to drm_dbg_kms 



One instance of DRM_DEBUG_KMS was leftover in dp_link_training, convert
it to the new shiny.

Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210310214845.29021-2-sean@poorly.run
parent 65e3fe10

drivers/gpu/drm/i915/display/intel_dp_link_training.c

+8 −7
Original line number Diff line number Diff line
@@ -26,10 +26,11 @@ 
#include "intel_dp_link_training.h"



static void

intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])

intel_dp_dump_link_status(struct drm_device *drm,

			  const u8 link_status[DP_LINK_STATUS_SIZE])

{



	DRM_DEBUG_KMS("ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",

	drm_dbg_kms(drm,

		    "ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",

		    link_status[0], link_status[1], link_status[2],

		    link_status[3], link_status[4], link_status[5]);

}
@@ -642,7 +643,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, 
		/* Make sure clock is still ok */

		if (!drm_dp_clock_recovery_ok(link_status,

					      crtc_state->lane_count)) {

			intel_dp_dump_link_status(link_status);

			intel_dp_dump_link_status(&i915->drm, link_status);

			drm_dbg_kms(&i915->drm,

				    "Clock recovery check failed, cannot "

				    "continue channel equalization\n");
@@ -669,7 +670,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, 


	/* Try 5 times, else fail and try at lower BW */

	if (tries == 5) {

		intel_dp_dump_link_status(link_status);

		intel_dp_dump_link_status(&i915->drm, link_status);

		drm_dbg_kms(&i915->drm,

			    "Channel equalization failed 5 times\n");

	}