Commit 41ec910a authored by Jian Shen's avatar Jian Shen Committed by Yang Yingliang
Browse files

net: hns3: fix mixed flag HCLGE_FLAG_MQPRIO_ENABLE and HCLGE_FLAG_DCB_ENABLE



dirver inclusion
category: feature
bugzilla: NA
CVE: NA

----------------------------------------------------------------------

HCLGE_FLAG_MQPRIO_ENABLE is supposed to set when enable
multiple TCs with tc mqprio, and HCLGE_FLAG_DCB_ENABLE is
supposed to set when enable multiple TCs with ets. But
the driver mixed the flags when updating the tm configuration.

Furtherly, PFC should be available when HCLGE_FLAG_MQPRIO_ENABLE
too, so remove the unnecessary limitation.

Fixes: 5a5c9091 ("net: hns3: add support for tc mqprio offload")

Signed-off-by: default avatarJian Shen <shenjian15@huawei.com>
Reviewed-by: default avatarGuangbin Huang <huangguangbin2@huawei.com>
Reviewed-by: default avatarPeng Li <lipeng321@huawei.com>
Reviewed-by: default avatarYufeng Mo <moyufeng@huawei.com>
Signed-off-by: default avatarJunxin Chen <chenjunxin1@huawei.com>
Reviewed-by: default avatarJunxin Chen <chenjunxin1@huawei.com>
Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
parent 85fe5d29
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+5 −2
Original line number Diff line number Diff line
@@ -225,6 +225,10 @@ static int hclge_ieee_setets(struct hnae3_handle *h, struct ieee_ets *ets)
	}

	hclge_tm_schd_info_update(hdev, num_tc);
	if (num_tc > 1)
		hdev->flag |= HCLGE_FLAG_DCB_ENABLE;
	else
		hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;

	ret = hclge_ieee_ets_to_tm_info(hdev, ets);
	if (ret)
@@ -295,8 +299,7 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc)
	u8 i, j, pfc_map, *prio_tc;
	int ret;

	if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) ||
	    hdev->flag & HCLGE_FLAG_MQPRIO_ENABLE)
	if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
		return -EINVAL;

	if (pfc->pfc_en == hdev->tm_info.pfc_en)
+5 −26
Original line number Diff line number Diff line
@@ -686,14 +686,6 @@ static void hclge_tm_tc_info_init(struct hclge_dev *hdev)
	for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
		hdev->tm_info.prio_tc[i] =
			(i >= hdev->tm_info.num_tc) ? 0 : i;

	/* DCB is enabled if we have more than 1 TC or pfc_en is
	 * non-zero.
	 */
	if (hdev->tm_info.num_tc > 1 || hdev->tm_info.pfc_en)
		hdev->flag |= HCLGE_FLAG_DCB_ENABLE;
	else
		hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;
}

static void hclge_tm_pg_info_init(struct hclge_dev *hdev)
@@ -721,12 +713,12 @@ static void hclge_tm_pg_info_init(struct hclge_dev *hdev)
	}
}

static void hclge_pfc_info_init(struct hclge_dev *hdev)
void hclge_tm_pfc_info_update(struct hclge_dev *hdev)
{
	if (!(hdev->flag & HCLGE_FLAG_DCB_ENABLE)) {
	if (hdev->tm_info.num_tc == 1 && !hdev->tm_info.pfc_en) {
		if (hdev->fc_mode_last_time == HCLGE_FC_PFC)
			dev_warn(&hdev->pdev->dev,
				 "DCB is disable, but last mode is FC_PFC\n");
				 "Only 1 tc used, but last mode is FC_PFC\n");

		hdev->tm_info.fc_mode = hdev->fc_mode_last_time;
	} else if (hdev->tm_info.fc_mode != HCLGE_FC_PFC) {
@@ -747,7 +739,7 @@ static void hclge_tm_schd_info_init(struct hclge_dev *hdev)

	hclge_tm_vport_info_update(hdev);

	hclge_pfc_info_init(hdev);
	hclge_tm_pfc_info_update(hdev);
}

static int hclge_tm_pg_to_pri_map(struct hclge_dev *hdev)
@@ -1476,19 +1468,6 @@ void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc)
	hclge_tm_schd_info_init(hdev);
}

void hclge_tm_pfc_info_update(struct hclge_dev *hdev)
{
	/* DCB is enabled if we have more than 1 TC or pfc_en is
	 * non-zero.
	 */
	if (hdev->tm_info.num_tc > 1 || hdev->tm_info.pfc_en)
		hdev->flag |= HCLGE_FLAG_DCB_ENABLE;
	else
		hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;

	hclge_pfc_info_init(hdev);
}

int hclge_tm_init_hw(struct hclge_dev *hdev, bool init)
{
	int ret;
@@ -1534,7 +1513,7 @@ int hclge_tm_vport_map_update(struct hclge_dev *hdev)
	if (ret)
		return ret;

	if (!(hdev->flag & HCLGE_FLAG_DCB_ENABLE))
	if (hdev->tm_info.num_tc == 1 && !hdev->tm_info.pfc_en)
		return 0;

	return hclge_tm_bp_setup(hdev);