Unverified Commit 41ebfc91 authored by Conor Dooley's avatar Conor Dooley Committed by Palmer Dabbelt
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dt-bindings: riscv: explicitly mention assumption of Zicsr & Zifencei support 



The dt-binding was defined before the extraction of csr access and
fence.i into their own extensions, and thus the presence of the I
base extension implies Zicsr and Zifencei.
There's no harm in adding them obviously, but for backwards
compatibility with DTs that existed prior to that extraction, software
is unable to differentiate between "i" and "i_zicsr_zifencei" without
any further information.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230427-fence-blurred-c92fb69d4137@wendy


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent f9c4bbdd

Documentation/devicetree/bindings/riscv/cpus.yaml

+6 −0
Original line number Diff line number Diff line
@@ -86,6 +86,12 @@ properties: 
      User-Level ISA document, available from

      https://riscv.org/specifications/



      Due to revisions of the ISA specification, some deviations

      have arisen over time.

      Notably, riscv,isa was defined prior to the creation of the

      Zicsr and Zifencei extensions and thus "i" implies

      "zicsr_zifencei".



      While the isa strings in ISA specification are case

      insensitive, letters in the riscv,isa string must be all

      lowercase to simplify parsing.