Loading Documentation/devicetree/bindings/edac/dmc-520.yaml 0 → 100644 +59 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/edac/dmc-520.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM DMC-520 EDAC bindings maintainers: - Lei Wang <lewan@microsoft.com> description: |+ DMC-520 node is defined to describe DRAM error detection and correction. https://static.docs.arm.com/100000/0200/corelink_dmc520_trm_100000_0200_01_en.pdf properties: compatible: items: - const: brcm,dmc-520 - const: arm,dmc-520 reg: maxItems: 1 interrupts: minItems: 1 maxItems: 10 interrupt-names: minItems: 1 maxItems: 10 items: enum: - ram_ecc_errc - ram_ecc_errd - dram_ecc_errc - dram_ecc_errd - failed_access - failed_prog - link_err - temperature_event - arch_fsm - phy_request required: - compatible - reg - interrupts - interrupt-names examples: - | dmc0: dmc@200000 { compatible = "brcm,dmc-520", "arm,dmc-520"; reg = <0x200000 0x80000>; interrupts = <0x0 0x349 0x4>, <0x0 0x34B 0x4>; interrupt-names = "dram_ecc_errc", "dram_ecc_errd"; }; MAINTAINERS +6 −0 Original line number Diff line number Diff line Loading @@ -5998,6 +5998,12 @@ F: Documentation/driver-api/edac.rst F: drivers/edac/ F: include/linux/edac.h EDAC-DMC520 M: Lei Wang <lewan@microsoft.com> L: linux-edac@vger.kernel.org S: Supported F: drivers/edac/dmc520_edac.c EDAC-E752X M: Mark Gross <mark.gross@intel.com> L: linux-edac@vger.kernel.org Loading drivers/edac/Kconfig +7 −0 Original line number Diff line number Diff line Loading @@ -523,4 +523,11 @@ config EDAC_BLUEFIELD Support for error detection and correction on the Mellanox BlueField SoCs. config EDAC_DMC520 tristate "ARM DMC-520 ECC" depends on ARM64 help Support for error detection and correction on the SoCs with ARM DMC-520 DRAM controller. endif # EDAC drivers/edac/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -87,3 +87,4 @@ obj-$(CONFIG_EDAC_TI) += ti_edac.o obj-$(CONFIG_EDAC_QCOM) += qcom_edac.o obj-$(CONFIG_EDAC_ASPEED) += aspeed_edac.o obj-$(CONFIG_EDAC_BLUEFIELD) += bluefield_edac.o obj-$(CONFIG_EDAC_DMC520) += dmc520_edac.o drivers/edac/armada_xp_edac.c +13 −13 Original line number Diff line number Diff line Loading @@ -429,26 +429,26 @@ static void aurora_l2_check(struct edac_device_ctl_info *dci) src = (attr_cap & AURORA_ERR_ATTR_SRC_MSK) >> AURORA_ERR_ATTR_SRC_OFF; if (src <= 3) len += snprintf(msg+len, size-len, "src=CPU%d ", src); len += scnprintf(msg+len, size-len, "src=CPU%d ", src); else len += snprintf(msg+len, size-len, "src=IO "); len += scnprintf(msg+len, size-len, "src=IO "); txn = (attr_cap & AURORA_ERR_ATTR_TXN_MSK) >> AURORA_ERR_ATTR_TXN_OFF; switch (txn) { case 0: len += snprintf(msg+len, size-len, "txn=Data-Read "); len += scnprintf(msg+len, size-len, "txn=Data-Read "); break; case 1: len += snprintf(msg+len, size-len, "txn=Isn-Read "); len += scnprintf(msg+len, size-len, "txn=Isn-Read "); break; case 2: len += snprintf(msg+len, size-len, "txn=Clean-Flush "); len += scnprintf(msg+len, size-len, "txn=Clean-Flush "); break; case 3: len += snprintf(msg+len, size-len, "txn=Eviction "); len += scnprintf(msg+len, size-len, "txn=Eviction "); break; case 4: len += snprintf(msg+len, size-len, len += scnprintf(msg+len, size-len, "txn=Read-Modify-Write "); break; } Loading @@ -456,19 +456,19 @@ static void aurora_l2_check(struct edac_device_ctl_info *dci) err = (attr_cap & AURORA_ERR_ATTR_ERR_MSK) >> AURORA_ERR_ATTR_ERR_OFF; switch (err) { case 0: len += snprintf(msg+len, size-len, "err=CorrECC "); len += scnprintf(msg+len, size-len, "err=CorrECC "); break; case 1: len += snprintf(msg+len, size-len, "err=UnCorrECC "); len += scnprintf(msg+len, size-len, "err=UnCorrECC "); break; case 2: len += snprintf(msg+len, size-len, "err=TagParity "); len += scnprintf(msg+len, size-len, "err=TagParity "); break; } len += snprintf(msg+len, size-len, "addr=0x%x ", addr_cap & AURORA_ERR_ADDR_CAP_ADDR_MASK); len += snprintf(msg+len, size-len, "index=0x%x ", (way_cap & AURORA_ERR_WAY_IDX_MSK) >> AURORA_ERR_WAY_IDX_OFF); len += snprintf(msg+len, size-len, "way=0x%x", (way_cap & AURORA_ERR_WAY_CAP_WAY_MASK) >> AURORA_ERR_WAY_CAP_WAY_OFFSET); len += scnprintf(msg+len, size-len, "addr=0x%x ", addr_cap & AURORA_ERR_ADDR_CAP_ADDR_MASK); len += scnprintf(msg+len, size-len, "index=0x%x ", (way_cap & AURORA_ERR_WAY_IDX_MSK) >> AURORA_ERR_WAY_IDX_OFF); len += scnprintf(msg+len, size-len, "way=0x%x", (way_cap & AURORA_ERR_WAY_CAP_WAY_MASK) >> AURORA_ERR_WAY_CAP_WAY_OFFSET); /* clear error capture registers */ writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG); Loading Loading
Documentation/devicetree/bindings/edac/dmc-520.yaml 0 → 100644 +59 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/edac/dmc-520.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM DMC-520 EDAC bindings maintainers: - Lei Wang <lewan@microsoft.com> description: |+ DMC-520 node is defined to describe DRAM error detection and correction. https://static.docs.arm.com/100000/0200/corelink_dmc520_trm_100000_0200_01_en.pdf properties: compatible: items: - const: brcm,dmc-520 - const: arm,dmc-520 reg: maxItems: 1 interrupts: minItems: 1 maxItems: 10 interrupt-names: minItems: 1 maxItems: 10 items: enum: - ram_ecc_errc - ram_ecc_errd - dram_ecc_errc - dram_ecc_errd - failed_access - failed_prog - link_err - temperature_event - arch_fsm - phy_request required: - compatible - reg - interrupts - interrupt-names examples: - | dmc0: dmc@200000 { compatible = "brcm,dmc-520", "arm,dmc-520"; reg = <0x200000 0x80000>; interrupts = <0x0 0x349 0x4>, <0x0 0x34B 0x4>; interrupt-names = "dram_ecc_errc", "dram_ecc_errd"; };
MAINTAINERS +6 −0 Original line number Diff line number Diff line Loading @@ -5998,6 +5998,12 @@ F: Documentation/driver-api/edac.rst F: drivers/edac/ F: include/linux/edac.h EDAC-DMC520 M: Lei Wang <lewan@microsoft.com> L: linux-edac@vger.kernel.org S: Supported F: drivers/edac/dmc520_edac.c EDAC-E752X M: Mark Gross <mark.gross@intel.com> L: linux-edac@vger.kernel.org Loading
drivers/edac/Kconfig +7 −0 Original line number Diff line number Diff line Loading @@ -523,4 +523,11 @@ config EDAC_BLUEFIELD Support for error detection and correction on the Mellanox BlueField SoCs. config EDAC_DMC520 tristate "ARM DMC-520 ECC" depends on ARM64 help Support for error detection and correction on the SoCs with ARM DMC-520 DRAM controller. endif # EDAC
drivers/edac/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -87,3 +87,4 @@ obj-$(CONFIG_EDAC_TI) += ti_edac.o obj-$(CONFIG_EDAC_QCOM) += qcom_edac.o obj-$(CONFIG_EDAC_ASPEED) += aspeed_edac.o obj-$(CONFIG_EDAC_BLUEFIELD) += bluefield_edac.o obj-$(CONFIG_EDAC_DMC520) += dmc520_edac.o
drivers/edac/armada_xp_edac.c +13 −13 Original line number Diff line number Diff line Loading @@ -429,26 +429,26 @@ static void aurora_l2_check(struct edac_device_ctl_info *dci) src = (attr_cap & AURORA_ERR_ATTR_SRC_MSK) >> AURORA_ERR_ATTR_SRC_OFF; if (src <= 3) len += snprintf(msg+len, size-len, "src=CPU%d ", src); len += scnprintf(msg+len, size-len, "src=CPU%d ", src); else len += snprintf(msg+len, size-len, "src=IO "); len += scnprintf(msg+len, size-len, "src=IO "); txn = (attr_cap & AURORA_ERR_ATTR_TXN_MSK) >> AURORA_ERR_ATTR_TXN_OFF; switch (txn) { case 0: len += snprintf(msg+len, size-len, "txn=Data-Read "); len += scnprintf(msg+len, size-len, "txn=Data-Read "); break; case 1: len += snprintf(msg+len, size-len, "txn=Isn-Read "); len += scnprintf(msg+len, size-len, "txn=Isn-Read "); break; case 2: len += snprintf(msg+len, size-len, "txn=Clean-Flush "); len += scnprintf(msg+len, size-len, "txn=Clean-Flush "); break; case 3: len += snprintf(msg+len, size-len, "txn=Eviction "); len += scnprintf(msg+len, size-len, "txn=Eviction "); break; case 4: len += snprintf(msg+len, size-len, len += scnprintf(msg+len, size-len, "txn=Read-Modify-Write "); break; } Loading @@ -456,19 +456,19 @@ static void aurora_l2_check(struct edac_device_ctl_info *dci) err = (attr_cap & AURORA_ERR_ATTR_ERR_MSK) >> AURORA_ERR_ATTR_ERR_OFF; switch (err) { case 0: len += snprintf(msg+len, size-len, "err=CorrECC "); len += scnprintf(msg+len, size-len, "err=CorrECC "); break; case 1: len += snprintf(msg+len, size-len, "err=UnCorrECC "); len += scnprintf(msg+len, size-len, "err=UnCorrECC "); break; case 2: len += snprintf(msg+len, size-len, "err=TagParity "); len += scnprintf(msg+len, size-len, "err=TagParity "); break; } len += snprintf(msg+len, size-len, "addr=0x%x ", addr_cap & AURORA_ERR_ADDR_CAP_ADDR_MASK); len += snprintf(msg+len, size-len, "index=0x%x ", (way_cap & AURORA_ERR_WAY_IDX_MSK) >> AURORA_ERR_WAY_IDX_OFF); len += snprintf(msg+len, size-len, "way=0x%x", (way_cap & AURORA_ERR_WAY_CAP_WAY_MASK) >> AURORA_ERR_WAY_CAP_WAY_OFFSET); len += scnprintf(msg+len, size-len, "addr=0x%x ", addr_cap & AURORA_ERR_ADDR_CAP_ADDR_MASK); len += scnprintf(msg+len, size-len, "index=0x%x ", (way_cap & AURORA_ERR_WAY_IDX_MSK) >> AURORA_ERR_WAY_IDX_OFF); len += scnprintf(msg+len, size-len, "way=0x%x", (way_cap & AURORA_ERR_WAY_CAP_WAY_MASK) >> AURORA_ERR_WAY_CAP_WAY_OFFSET); /* clear error capture registers */ writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG); Loading