Commit 41b7a347 authored by Daniel Axtens's avatar Daniel Axtens Committed by Michael Ellerman
Browse files

powerpc: Book3S 64-bit outline-only KASAN support 



Implement a limited form of KASAN for Book3S 64-bit machines running under
the Radix MMU, supporting only outline mode.

 - Enable the compiler instrumentation to check addresses and maintain the
   shadow region. (This is the guts of KASAN which we can easily reuse.)

 - Require kasan-vmalloc support to handle modules and anything else in
   vmalloc space.

 - KASAN needs to be able to validate all pointer accesses, but we can't
   instrument all kernel addresses - only linear map and vmalloc. On boot,
   set up a single page of read-only shadow that marks all iomap and
   vmemmap accesses as valid.

 - Document KASAN in powerpc docs.

Background
----------

KASAN support on Book3S is a bit tricky to get right:

 - It would be good to support inline instrumentation so as to be able to
   catch stack issues that cannot be caught with outline mode.

 - Inline instrumentation requires a fixed offset.

 - Book3S runs code with translations off ("real mode") during boot,
   including a lot of generic device-tree parsing code which is used to
   determine MMU features.

    [ppc64 mm note: The kernel installs a linear mapping at effective
    address c000...-c008.... This is a one-to-one mapping with physical
    memory from 0000... onward. Because of how memory accesses work on
    powerpc 64-bit Book3S, a kernel pointer in the linear map accesses the
    same memory both with translations on (accessing as an 'effective
    address'), and with translations off (accessing as a 'real
    address'). This works in both guests and the hypervisor. For more
    details, see s5.7 of Book III of version 3 of the ISA, in particular
    the Storage Control Overview, s5.7.3, and s5.7.5 - noting that this
    KASAN implementation currently only supports Radix.]

 - Some code - most notably a lot of KVM code - also runs with translations
   off after boot.

 - Therefore any offset has to point to memory that is valid with
   translations on or off.

One approach is just to give up on inline instrumentation. This way
boot-time checks can be delayed until after the MMU is set is up, and we
can just not instrument any code that runs with translations off after
booting. Take this approach for now and require outline instrumentation.

Previous attempts allowed inline instrumentation. However, they came with
some unfortunate restrictions: only physically contiguous memory could be
used and it had to be specified at compile time. Maybe we can do better in
the future.

[paulus@ozlabs.org - Rebased onto 5.17.  Note that a kernel with
 CONFIG_KASAN=y will crash during boot on a machine using HPT
 translation because not all the entry points to the generic
 KASAN code are protected with a call to kasan_arch_is_ready().]

Originally-by: Balbir Singh <bsingharora@gmail.com> # ppc64 out-of-line radix version
Signed-off-by: default avatarDaniel Axtens <dja@axtens.net>
Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
[mpe: Update copyright year and comment formatting]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/YoTE69OQwiG7z+Gu@cleo
parent 2ab2d579

Documentation/powerpc/kasan.txt

+47 −1
Original line number Diff line number Diff line 
KASAN is supported on powerpc on 32-bit only.

KASAN is supported on powerpc on 32-bit and Radix 64-bit only.



32 bit support

==============
@@ -10,3 +10,49 @@ fixmap area and occupies one eighth of the total kernel virtual memory space. 


Instrumentation of the vmalloc area is optional, unless built with modules,

in which case it is required.



64 bit support

==============



Currently, only the radix MMU is supported. There have been versions for hash

and Book3E processors floating around on the mailing list, but nothing has been

merged.



KASAN support on Book3S is a bit tricky to get right:



 - It would be good to support inline instrumentation so as to be able to catch

   stack issues that cannot be caught with outline mode.



 - Inline instrumentation requires a fixed offset.



 - Book3S runs code with translations off ("real mode") during boot, including a

   lot of generic device-tree parsing code which is used to determine MMU

   features.



 - Some code - most notably a lot of KVM code - also runs with translations off

   after boot.



 - Therefore any offset has to point to memory that is valid with

   translations on or off.



One approach is just to give up on inline instrumentation. This way boot-time

checks can be delayed until after the MMU is set is up, and we can just not

instrument any code that runs with translations off after booting. This is the

current approach.



To avoid this limitiation, the KASAN shadow would have to be placed inside the

linear mapping, using the same high-bits trick we use for the rest of the linear

mapping. This is tricky:



 - We'd like to place it near the start of physical memory. In theory we can do

   this at run-time based on how much physical memory we have, but this requires

   being able to arbitrarily relocate the kernel, which is basically the tricky

   part of KASLR. Not being game to implement both tricky things at once, this

   is hopefully something we can revisit once we get KASLR for Book3S.



 - Alternatively, we can place the shadow at the _end_ of memory, but this

   requires knowing how much contiguous physical memory a system has _at compile

   time_. This is a big hammer, and has some unfortunate consequences: inablity

   to handle discontiguous physical memory, total failure to boot on machines

   with less memory than specified, and that machines with more memory than

   specified can't use it. This was deemed unacceptable.

arch/powerpc/Kconfig

+4 −1
Original line number Diff line number Diff line
@@ -109,6 +109,7 @@ config PPC 
	# Please keep this list sorted alphabetically.

	#

	select ARCH_32BIT_OFF_T if PPC32

	select ARCH_DISABLE_KASAN_INLINE	if PPC_RADIX_MMU

	select ARCH_ENABLE_MEMORY_HOTPLUG

	select ARCH_ENABLE_MEMORY_HOTREMOVE

	select ARCH_HAS_COPY_MC			if PPC64
@@ -157,6 +158,7 @@ config PPC 
	select ARCH_WANT_IPC_PARSE_VERSION

	select ARCH_WANT_IRQS_OFF_ACTIVATE_MM

	select ARCH_WANT_LD_ORPHAN_WARN

	select ARCH_WANTS_NO_INSTR

	select ARCH_WEAK_RELEASE_ACQUIRE

	select BINFMT_ELF

	select BUILDTIME_TABLE_SORT
@@ -188,7 +190,8 @@ config PPC 
	select HAVE_ARCH_JUMP_LABEL

	select HAVE_ARCH_JUMP_LABEL_RELATIVE

	select HAVE_ARCH_KASAN			if PPC32 && PPC_PAGE_SHIFT <= 14

	select HAVE_ARCH_KASAN_VMALLOC		if PPC32 && PPC_PAGE_SHIFT <= 14

	select HAVE_ARCH_KASAN			if PPC_RADIX_MMU

	select HAVE_ARCH_KASAN_VMALLOC		if HAVE_ARCH_KASAN

	select HAVE_ARCH_KFENCE			if PPC_BOOK3S_32 || PPC_8xx || 40x

	select HAVE_ARCH_KGDB

	select HAVE_ARCH_MMAP_RND_BITS

arch/powerpc/Kconfig.debug

+2 −1
Original line number Diff line number Diff line
@@ -374,4 +374,5 @@ config PPC_FAST_ENDIAN_SWITCH 
config KASAN_SHADOW_OFFSET

	hex

	depends on KASAN

	default 0xe0000000
 
	default 0xe0000000 if PPC32

	default 0xa80e000000000000 if PPC64

arch/powerpc/include/asm/book3s/64/hash.h

+4 −0
Original line number Diff line number Diff line
@@ -18,6 +18,10 @@ 
#include <asm/book3s/64/hash-4k.h>

#endif



#define H_PTRS_PER_PTE		(1 << H_PTE_INDEX_SIZE)

#define H_PTRS_PER_PMD		(1 << H_PMD_INDEX_SIZE)

#define H_PTRS_PER_PUD		(1 << H_PUD_INDEX_SIZE)



/* Bits to set in a PMD/PUD/PGD entry valid bit*/

#define HASH_PMD_VAL_BITS		(0x8000000000000000UL)

#define HASH_PUD_VAL_BITS		(0x8000000000000000UL)

arch/powerpc/include/asm/book3s/64/pgtable.h

+3 −0
Original line number Diff line number Diff line
@@ -232,6 +232,9 @@ extern unsigned long __pmd_frag_size_shift; 
#define PTRS_PER_PUD	(1 << PUD_INDEX_SIZE)

#define PTRS_PER_PGD	(1 << PGD_INDEX_SIZE)



#define MAX_PTRS_PER_PTE ((H_PTRS_PER_PTE > R_PTRS_PER_PTE) ? H_PTRS_PER_PTE : R_PTRS_PER_PTE)

#define MAX_PTRS_PER_PMD ((H_PTRS_PER_PMD > R_PTRS_PER_PMD) ? H_PTRS_PER_PMD : R_PTRS_PER_PMD)

#define MAX_PTRS_PER_PUD ((H_PTRS_PER_PUD > R_PTRS_PER_PUD) ? H_PTRS_PER_PUD : R_PTRS_PER_PUD)

#define MAX_PTRS_PER_PGD	(1 << (H_PGD_INDEX_SIZE > RADIX_PGD_INDEX_SIZE ? \

				       H_PGD_INDEX_SIZE : RADIX_PGD_INDEX_SIZE))